Perlinn
Perlinn

Reputation: 45

Construct circuit using only NAND and NOT GATES

AD + AC + B'D'

In the image above, circuit is Sum of Products

(B’+D’) (A+D) (A+C)

The image below is my attempt on using NAND and NOT gates only. However, my senses is telling me that I am doing it wrongly. Please help!

((A'D')'(A'C')'(B'D')')'

Upvotes: 0

Views: 1004

Answers (2)

user3657941
user3657941

Reputation:

The first circuit actually implements

AD + AC + B'D'

which is this circuit:

AD + AC + B'D'

Using De Morgan's Laws, this is equivalent to

((AD)'(AC)'(B'D')')'

which is this circuit:

((AD)'(AC)'(B'D')')'

This Python program can be used to compare the circuits:

import itertools
# Create all the possible input combinations
x = (True, False)
comb = set(itertools.product(x, x, x, x))
# AD + AC + B'D'
def c1(a, b, c, d):
    return ((a and d) or (a and c) or ((not b) and (not d)))
# ((AD)'(AC)'(B'D')')'
def c2(a, b, c, d):
    return not ((not (a and d)) and (not (a and c)) and (not ((not b) and (not d))))
# For each input, verify that the results are the same
for x in comb:
    r1 = c1(*x)
    r2 = c2(*x)
    if r1 != r2:
        print "Error: Input %s produced %s != %s" % (x, r1, r2)

Upvotes: 1

rsqLVo
rsqLVo

Reputation: 498

You can replace all AND gates with NAND gates and just negate the result. I can see that you negated the inputs, which is wrong because:

(ab)'  !=  a'b'

As an example think about signals (a, b) = (1, 0). If you negate them and calculate output, you get 0. If you first calculate and then negate output, you get 1.

About the OR gate:

a + b + c  ->  ((a + b + c)')'  ->  (a'b'c')'

So OR gate is NAND gate with all signals negated.

Upvotes: 0

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