Reputation: 2386
My makefile runs but it does not execute the cleaning of the object file and executable files, as specified by rm -f $(PROJECT) $(OBJ)
. What am I doing wrong?
makefile
PROJECT = cfind
HEADERS = $(cfind.h)
OBJ = argv.o globals.o main.o pathInfo.o
C99 = cc -std=c99
CFLAGS = -Wall -pedantic -Werror
$(PROJECT) : $(OBJ)
$(C99) $(CFLAGS) -o $(PROJECT) $(OBJ)
%.o : %.c $(HEADERS)
$(C99) $(CFLAGS) -c $<
clean:
rm -f $(PROJECT) $(OBJ)
Upvotes: 0
Views: 564
Reputation: 182893
When you execute make
, it makes whatever target you tell it to make. Unless you tell it make the clean
target, or that target is a dependency of the one you did tell it to make, it won't make that target. The main purpose of makefiles and specifying dependencies (rather than just using a build script) is to perform only the required operations. By default, make
makes the first target in the makefile.
I think you are missing the whole point of a makefile and the reason you specify dependencies. The reason you have $(PROJECT) : $(OBJ)
is so that it knows it doesn't have to make that target if the object files haven't changed.
Why do you want it to rebuild the project even if nothing has changed?
Upvotes: 1