CODEWITHSUNDEEP
assemblyx86instructionsmachine-code
DualCore
DualCore

Reputation: 420

Assembler, what is seventh bit in SUB instruction used for?

In my papers which i got from university i've got something like this:

SUB
1. Subtracting value from register
| 100000 s w | 11 101 reg | value(L) | value(...) | value(...) | value(H) |

I know what "w" stands for. It specifies if the register in "reg" field is 8 or 16/32 bit, but what is the "s" option? What does it stands for? I searched through the internet but i havent found a clear answer.

Upvotes: 0

Views: 259

Answers (1)

Johan
Johan

Reputation: 76713

The s stands for sign extend.

SUB 80-83 stands for sub reg, imm.

The SUB versions 82 and 83 sign extend the immediate operand, as can be seen here

http://ref.x86asm.net/#column_flds

w means bit w (bit index 0, operand size) is present; may be combined with bits d or s. 04 ADD s means bit s (bit index 1, Sign-extend) is present; may be combined with bit w. 6B IMUL.

The allows the immediate operand to be smaller and thus allows for more compact code.

You can view the full opcode map at: http://ref.x86asm.net/geek.html

Note that both 80 and 82 denote arithmetic with byte operands. The 80 is without and the 82 is with sign extension; however sign extension on a byte operand is a no-op, so 82 is an alias for 80.
In order to simplify decoding Intel choose not to repurpose the redundant 82 opcodes, but just allow them as aliases for the official 80 ones.

The x86 opcode map has about a dozen aliases, holdovers from the days that Intel could not simply throw more silicon at the decoding problem.

Upvotes: 3

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