Karthiksrndrn
Karthiksrndrn

Reputation: 178

What do the terms 'Instruction Stream' and 'Data Stream' mean in the context of Flynn's Taxonomy?

I initially ran into this doubt while trying to figure out whether a pipelined / super-scalar CPU is SISD, SIMD, MISD or MIMD. I did later read from Wikipedia (SISD article) that:

"According to Michael J. Flynn, SISD can have concurrent processing characteristics. Pipelined processors and superscalar processors are common examples found in most modern SISD computers."

Also from Wikipedia (MISD article):

"Pipeline architectures belong to this [MISD] type, though a purist might say that the data is different after processing by each stage in the pipeline."

So, is it correct to conclude that:

1) The requirement for 'Single Instruction Stream' processing is that there is only a single high-level thread of execution.

2) Just because instruction level parallelism in a thread is exploited, it cannot be considered 'Multiple Instruction Stream' processing.

What about the term 'Single Data Stream'?

Can someone say what the data stream for the following MIPS assembly code is:

  addi $s1,$s0,4
  lw $t0,0($s0)
  add $s2,$s0,$s1

Is it a 'Single Data Stream'? Does this situation change if the system exploits instruction-level parallelism?

Upvotes: 3

Views: 2752

Answers (1)

Isuru H
Isuru H

Reputation: 1221

Think of a stream as an array of "stuff". If we are looking at SISD, then there is single array of instructions and single array of data. You pick an instruction form the instruction array and you operate on the data array. If we are going for SIMD, then there is only single array of instructions, but you get multiple data arrays. Therefore simply by looking at the instruction stream, as provided in your case, we cannot say whether its SISD or SIMD. If the underlying architecture has pipelines replicated, and each has a dedicated data stream (same as our data array), then the instruction given to that pipeline will operate on the dedicated data stream to that pipeline. All these pipelines has the everything replicated, registers etc. Therefore the addi $si,$s0,4 will be adding different values in each pipeline.

When we talk about ILP, we are basically looking for parallelism within a single thread and that's orthogonal to SISD or SIMD, because we want to exploit ILP in both cases.

Upvotes: 2

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