CODEWITHSUNDEEP
makefiletcl
Mena Labib
Mena Labib

Reputation: 1

Reading a TCL variable in a Makefile

I am trying to read (and eventually set to a Make variable) the value of a variable set in a TCL script in order to echo it to a file.

(I know I can simply puts the var to the file, but it's a more complicated flow, and doing it in the Make would be easier. Just want to know if this is possible) 

Set final_val "Test finished! No Failures"

I then want to use the value of final_val (set in the TCL) in the Makefile that calls the script:

@file.tcl
@echo final_val >> $(out_file)

P.S. I am on TCL 8.5

Upvotes: 0

Views: 1610

Answers (1)

Donal Fellows
Donal Fellows

Reputation: 137767

It's not trivial to get a value in a Tcl script into a make run. The simplest way might be to arrange for the script to produce that variable as its only output, as you can then use a fairly simple approach:

On the Tcl side:

#!/usr/bin/env tclsh
set final_val "Test finished! No Failures"
puts $final_val

On the Make side (assuming you've made everything executable):

FINAL_VAL := $(shell thescript.tcl)

There's a lot more complexity possible than just this, of course, but this is the simplest technique that could possibly work.

If you're producing a lot of output in that script, you might need to instead use a separate post-processing of the output to get the part you want. That can get really complex; those cases are often better off being converted to using intermediate files, possibly with recursive makes, as you don't really want to have significant processing done during the variable definition phase of processing a makefile (as it causes real headaches when it goes wrong, and puts you in a world of pain with debugging).

One way that's more complex but which works really well for me is to make the Tcl code generate some file, perhaps outputinfo.mk, that contains the make variable definitions that I want. (On the Tcl side, you're just writing to a file. There's loads of ways to do that.)

Then, I'd make the main makefile have a dependency rule that says that you generate outputinfo.mk you need to run the Tcl script, and then say that the makefile wants to include that outputinfo.mk:

outputinfo.mk:
    thescript.tcl > outputinfo.mk

include outputinfo.mk

(For the sake of argument, I'm assuming here that the script writes the file contents to stdout with puts.)

This works well, since make knows about such dependencies caused by include and does the right thing.

Upvotes: 0

Related Questions