Chan Kim
Chan Kim

Reputation: 6009

how does % work in Makefile when there is a rule for more specific pattern for that %?

I have a Makefile inside which are these rules(shown only parts).

OBJ=gemm.o utils.o cuda.o ...
ASMS        =  abts_crt2.S
OBJ+= $(ASMS:.S=.o)
LDS         = ldabts.lds

OBJS = $(addprefix $(OBJDIR), $(OBJ))
DEPS = $(wildcard src/*.h) Makefile

$(OBJDIR)%.o : %.S                 # <---- rule 1
    $(CC) -c $(CFLAGS) -D__ASSEMBLY__ $< -o $@
$(OBJDIR)%.lds : %.lds.S                # <------ rule 2
    $(CC) -E $(CFLAGS) -D__START__=$(START_BASE) -m32 -P -C -Usparc $< -o $@
test2: $(OBJS) $(LDS)                   # <----- rule 3
    $(CC) $(COMMON) $(CFLAGS) $< -T $(LDS) $(LIBS) -o $@ $(LDFLAGS)

I have a file called ldabts.lds.S in the VPATH and I wanted it to be processed by rule 2. But when I do make test2, rule 1 is kicked in and it tries to make objs/ldabts.lds.o from ldabts.lds.S and gives me various errors. Of course if I do make obj/ldabts.lds, it works fine using rule 2. How can I prevent ldabts.lds.S file from being processed by rule 1?

Upvotes: 0

Views: 46

Answers (1)

Chris Dodd
Chris Dodd

Reputation: 126536

You're looking at it backwards -- what matters is the target -- the pattern before the colon. So there's no commonality between these patterns; they match completely different targets. If you tell make to build objs/ldabts.lds.o, it will try to use the first rule as that is what matches (and its the only rule that matches, from what you've shown). If you don't want that, don't try to make objs/ldabts.lds.o

From your additional edit, it looks like the problem is that you have test2 depend on ldabt.lds, which has no $(OBJDIR) prefix. Because that prefix isn't there, your rule 2 does not apply and it looks for some other way to build it. It sees your rule 1, and combines that with the builtin rule %: %.o to build it that way. Add the $(OBJDIR) prefix (either in the definition of LDS or elsewhere with $(addprefix), and it should work fine.

Upvotes: 1

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