CODEWITHSUNDEEP
makefilegnu-make
GrAnd
GrAnd

Reputation: 10221

Multiple using of % pattern within the same target rule in Makefile

Let's say there are a number of rules like this:

prefix/FOO/FOO_suffix/FOO.txt: prefix/FOO/FOO_input.txt
    echo @<
prefix/BAR/BAR_suffix/BAR.txt: prefix/BAR/BAR_input.txt
    echo @<

Instead of that I would like to have a single implicit rule like:

prefix/%/%_suffix/%.txt: prefix/%/%_input.txt
    echo @*

(So, the % represents the same <word>)
Is it possible to achieve that without using foreach/eval/call/define functions and generating explicit rules for each <word>?

Upvotes: 0

Views: 93

Answers (1)

Renaud Pacalet
Renaud Pacalet

Reputation: 29393

GNU make's secondary expansion can sometimes be used instead of foreach-eval-call:

.SECONDEXPANSION:

prefix/%.txt: prefix/$$(notdir $$*)/$$(notdir $$*)_input.txt
    @echo '$<'

Demo:

$ make prefix/FOO/FOO_suffix/FOO.txt prefix/BAR/BAR_suffix/BAR.txt
prefix/FOO/FOO_input.txt
prefix/BAR/BAR_input.txt

But if the reason you do not want to use foreach-eval-call is that you find the double expansion difficult to understand and maintain, secondary expansion is maybe not that simpler. Compare:

MY_MACRO = prefix/$1/$1_suffix/$1.txt: prefix/$1/$1_input.txt

$(foreach t,FOO BAR,$(eval $(call MY_MACRO,$t)))

%.txt:
    @echo '$<'

See? Not even a single define or $$...

Upvotes: 1

Related Questions