Reputation: 379
Cortex M3 processor has two stack pointer: PSP, MSP. In some complex applications, user program use PSP pointed to user program stack. Exception handler use MSP pointed to main stack.
The question is: There is a interrupt happened when user program is running. Before entering into the interrupt handler, the R0-R3, R12, LR, PC, and xPSR registers would be pushed into stack. But which stack is used to store these registers ?
Upvotes: 5
Views: 3697
Reputation: 1551
According to my reading of the ARM documentation (Cortex-M3 Devices Generic User Guide), register stacking upon exception entry happens on the current stack and the processor then enters Handler mode. If you think about it, this is the most convenient behavior for ordinary circumstances.
Upvotes: 5