CODEWITHSUNDEEP
verilog
Tomer Wolberg
Tomer Wolberg

Reputation: 1356

Difference between {a,b} == 2'b10 and a & ~b in verilog

I just started to learn verilog and I was trying to create a mealy machine that finds the sequence 1010 so I wrote this:

module Find1010(input clk, input in, output reg out);
    reg [1:0]st = 0;
    wire a = {st[0], in} == 2'b10;
    wire b = {st   , in} == 3'b101;
    always @(posedge clk)
    begin
        out  =   a & st[1];
        st   =  {a | b, in};
    end
endmodule

and it worked but then i changed the line wire a = {st[0], in} == 2'b10;

to wire a = st[0] & ~in; and then the output was always 0. why is it happening and what's the difference between {st[0], in} == 2'b10 and st[0] & ~in?

this is the testbench i wrote:

module Test;
    reg in = 0, clk = 1;
    wire result;
    initial begin
         #4 in = 1;
         #4 in = 0;
         #2 in = 1;
         #2 in = 0;
         #2 in = 1;
         #2 in = 0;
         #2 in = 1;
         #4 in = 0;
         #2 in = 1;
         #2 in = 0;
         #3 $finish;
    end
    initial forever #1 clk = ~clk;
    always @(negedge clk)
        $display("Input: %b    Output: %b", in , result);
    Find1010 Mealy_Machine(
        .clk(clk),
        .in(in),
        .out(result)
    );
endmodule

Upvotes: 3

Views: 2654

Answers (2)

Karan Shah
Karan Shah

Reputation: 1992

Both are same.

Here is the relevant code snapshot.

module temp ();
  reg a, b;
  wire c, d;

  assign c = ({a, b} == 2'b10);
  assign d = (a & ~b);

  always @ (a, b)
  begin
    $display("------");
    $display("a = %0b, b = %0b, c = %0b", a, b, c);
    $display("a = %0b, b = %0b, d = %0b", a, b, d);
  end

  initial
  begin
    a = 1'b0; b = 1'b0;
#1  a = 1'b0; b = 1'b1;
#1  a = 1'b0; b = 1'bz;
#1  a = 1'b0; b = 1'bx;
#1  a = 1'b1; b = 1'b0;
#1  a = 1'b1; b = 1'b1;
#1  a = 1'b1; b = 1'bz;
#1  a = 1'b1; b = 1'bx;
#1  a = 1'bx; b = 1'b0;
#1  a = 1'bx; b = 1'b1;
#1  a = 1'bx; b = 1'bz;
#1  a = 1'bx; b = 1'bx;
#1  a = 1'bz; b = 1'b0;
#1  a = 1'bz; b = 1'b1;
#1  a = 1'bz; b = 1'bz;
#1  a = 1'bz; b = 1'bx;
  end
endmodule

// Output - 
------
a = 0, b = 0, c = 0
a = 0, b = 0, d = 0
------
a = 0, b = 1, c = 0
a = 0, b = 1, d = 0
------
a = 0, b = z, c = 0
a = 0, b = z, d = 0
------
a = 0, b = x, c = 0
a = 0, b = x, d = 0
------
a = 1, b = 0, c = 1
a = 1, b = 0, d = 1
------
a = 1, b = 1, c = 0
a = 1, b = 1, d = 0
------
a = 1, b = z, c = x
a = 1, b = z, d = x
------
a = 1, b = x, c = x
a = 1, b = x, d = x
------
a = x, b = 0, c = x
a = x, b = 0, d = x
------
a = x, b = 1, c = 0
a = x, b = 1, d = 0
------
a = x, b = z, c = x
a = x, b = z, d = x
------
a = x, b = x, c = x
a = x, b = x, d = x
------
a = z, b = 0, c = x
a = z, b = 0, d = x
------
a = z, b = 1, c = 0
a = z, b = 1, d = 0
------
a = z, b = z, c = x
a = z, b = z, d = x
------
a = z, b = x, c = x
a = z, b = x, d = x
------

However if you use ===, then the output will be different for c & d.

Reason is that === also takes into account 1'bx & 1'bz, whereas == does not.

assign c = ({a, b} == 2'b10);
assign d = (a & ~b);

------
a = 1, b = z, c = 0
a = 1, b = z, d = x

Upvotes: 0

dave_59
dave_59

Reputation: 42698

There is no difference (except when X's are involved)

The problem is you have a race condition in your testbench. You need to use non-blocking assignments to in. Or change clock period so changes to in do not fall on a clock edge.

Upvotes: 2

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