CODEWITHSUNDEEP
assemblyarmarmv7instruction-set
Sam Rolls
Sam Rolls

Reputation: 33

Why cant an immediate value be used in mul instruction?

I am writing instructions for the ARMv7 processor. I would like to know why I am not allowed to have a constant value in the MUL instruction itself? You're allowed with the ADD and SUB instruction so why not MUL?

Cheers

Upvotes: 3

Views: 4787

Answers (3)

old_timer
old_timer

Reputation: 71576

because arm uses somewhat fixed instruction lengths there arent that many bits left, there is a barrel shifter though so think scientific notation, you can have a cluster of bits shifted but not bits spread out (other than shifting around the top), so 0x00000099, 0x00099000, 0x09900000 are generally okay depending on the instruction/set, but 0x00900090 is likely not, certainly not 0x12345678 that wouldnt make sense. It is RISC not CISC not meant to have every instruction be able to do everything, think load store architecture more than CISC...

Upvotes: 0

Matteo Italia
Matteo Italia

Reputation: 126907

If you look at the instruction encoding table of the ARM ISA you'll see that only data processing instructions support immediate operands (with an interesting encoding, by the way); they are the only ones to have a 12-bit operand2, all the other have at most the 4-bit fields for Rs and Rm (the space that remains in between is used to disambiguate with other instruction categories).

This decision probably comes from the fact that embedding immediates in multiplication instructions is not particularly interesting; if the multiplier is known, mul is often a bad choice, as there are generally faster sequences of add/shift/sub. Also, the cost of a multiplication instruction may be such that the gain in latency obtained from having the immediate straight in the instruction does not justify "stealing" a slot of the 16 available in the encoding for data processing instructions.

Upvotes: 7

David Hoelzer
David Hoelzer

Reputation: 16381

That's just how that processor architecture works. Different architectures have different requirements.

Typically, a choice like this is a compromise decision in order to optimize other operations/memory access/cache utilization. The tradeoff is usually far more beneficial than including that instruction on silicon.

Upvotes: 1

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