StackOverflow Questions for Tag: instruction-set

Fernando Miguélez
Fernando Miguélez

Reputation: 11316

Determine target ISA extensions of binary file in Linux (library or executable)

Score: 61

Views: 81862

Answers: 7

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MrUnbelievable92
MrUnbelievable92

Reputation: 157

Why are there no NAND, NOR and XNOR instructions in X86?

Score: 6

Views: 2889

Answers: 1

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Jacob Miller
Jacob Miller

Reputation: 37

What is the difference between Processor Status Word (PSW) and Program Status Word (PSW)?

Score: 1

Views: 116

Answers: 1

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user11224591
user11224591

Reputation:

is x86-64 is just an alias name of EM64T?

Score: 2

Views: 965

Answers: 2

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Dmytro Kostenko
Dmytro Kostenko

Reputation: 235

Why Did LOCK-prefixed Instructions Become Preferred Over MFENCE for Memory Fences in the JVM on x86?

Score: 1

Views: 39

Answers: 0

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Fabio
Fabio

Reputation: 1505

What's the purpose of the rotate instructions (ROL, RCL on x86)?

Score: 33

Views: 37337

Answers: 7

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Cecil Ward
Cecil Ward

Reputation: 580

x86 rep prefix with a count of zero: what happens?

Score: 3

Views: 492

Answers: 1

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ZhaoCake
ZhaoCake

Reputation: 1

"unresolved import <my crates in project>" in Rust. Suspected to be caused by circular dependencies, but still reported an error after modification

Score: 0

Views: 26

Answers: 0

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Daniel Gartmann
Daniel Gartmann

Reputation: 13008

Which arithmetic instruction set operation is the slowest and the fastest? Are there any ranking? Benchmarks?

Score: 1

Views: 993

Answers: 2

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Jacob Miller
Jacob Miller

Reputation: 37

What does "trap entry point" means?

Score: -1

Views: 97

Answers: 1

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jwkoo
jwkoo

Reputation: 2643

Why are RISC-V S-B and U-J instruction types encoded in this way?

Score: 19

Views: 13436

Answers: 2

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UndercoverCoder
UndercoverCoder

Reputation: 1013

What does `b .` mean in this ASSEMBLY code?

Score: 8

Views: 32636

Answers: 1

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JeffV
JeffV

Reputation: 54467

When a gcc application is compiled in release mode (-O3) what instruction set extensions are used?

Score: 0

Views: 332

Answers: 1

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Zulfe
Zulfe

Reputation: 881

Why are the temporary registers split in the MIPS ISA?

Score: 6

Views: 3083

Answers: 0

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user153245
user153245

Reputation: 287

Understanding the Funct6 field in shift immediate instruction in RISC-V

Score: 0

Views: 39

Answers: 0

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mewais
mewais

Reputation: 1337

change instruction set in GCC

Score: 6

Views: 2650

Answers: 3

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JB_User
JB_User

Reputation: 3267

What exactly do the gcc compiler switches (-mavx -mavx2 -mavx512f) do?

Score: 7

Views: 14185

Answers: 2

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Priyanshu Yadav
Priyanshu Yadav

Reputation: 125

CLDEMOTE support in intel CPUs

Score: 1

Views: 100

Answers: 0

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NyxCode
NyxCode

Reputation: 728

Difference between AVR's "ADC r18, r18" and "ROL r18"

Score: 3

Views: 86

Answers: 2

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WriteBackCMO
WriteBackCMO

Reputation: 619

Can I use gcc -march to compile into other ISA

Score: 2

Views: 986

Answers: 3

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