StackOverflow Questions for Tag: instruction-set

Murad Bashirli

Reputation: 21

Are additional opcodes in RISC-V instructions important?

assemblycpu-architectureriscvinstruction-set

Score: 1

Answers: 2

Jogging Song

Reputation: 573

Why is im2col-based 2d-convolution more efficient than naive SIMD-accelerated 2d-convolution?

memoryfloating-pointconv-neural-networkcpu-architectureinstruction-set

Score: 6

Answers: 1

Izzo

Reputation: 4928

Are SIMD and VLIW instructions the same thing?

x86cpu-architecturesimdinstruction-setvliw

Score: 2

Answers: 2

yhgu2000

Reputation: 364

Why can't we have a safe ISA?

securitymemory-managementcpu-architectureinstruction-setmemory-safety

Score: 3

Answers: 3

MinecraftShamrock

Reputation: 3574

Which factors affect the needed compiler?

compilationoperating-systemcpucpu-architectureinstruction-set

Score: 3

Answers: 3

Bil_Bomba

Reputation: 181

What do the abbreviations (Rn, Rd, ...) in the instruction set of ARM mean?

assemblyarminstruction-setinstructionsthumb

Score: 6

Answers: 3

xmllmx

Reputation: 42379

Do I need to make multiple executables for targeting different instruction sets?

c++coptimizationinstruction-set

Score: 7

Answers: 2

Dan

Reputation: 29

Does FADDP ST(0), ST(1) make sense?

assemblyx86instruction-setx87

Score: 0

Answers: 1

Fernando Miguélez

Reputation: 11316

Determine target ISA extensions of binary file in Linux (library or executable)

linuxshared-librariesexecutablecpu-architectureinstruction-set

Score: 61

Answers: 7

MrUnbelievable92

Reputation: 157

Why are there no NAND, NOR and XNOR instructions in X86?

x86x86-64cpu-architectureinstructionsinstruction-set

Score: 6

Answers: 1

Jacob Miller

Reputation: 37

What is the difference between Processor Status Word (PSW) and Program Status Word (PSW)?

cpu-architecturecpu-registersinstruction-setinstructions

Score: 1

Answers: 1

user11224591

Reputation:

is x86-64 is just an alias name of EM64T?

x86-64cpuinstruction-set

Score: 2

Answers: 2

Dmytro Kostenko

Reputation: 235

Why Did LOCK-prefixed Instructions Become Preferred Over MFENCE for Memory Fences in the JVM on x86?

assemblyx86cpu-architecturememory-barriersinstruction-set

Score: 1

Answers: 0

Fabio

Reputation: 1505

What's the purpose of the rotate instructions (ROL, RCL on x86)?

assemblyx86cpu-architecturebit-shiftinstruction-set

Score: 33

Answers: 7

Cecil Ward

Reputation: 597

x86 rep prefix with a count of zero: what happens?

assemblyx86instruction-set

Score: 3

Answers: 1

ZhaoCake

Reputation: 1

"unresolved import <my crates in project>" in Rust. Suspected to be caused by circular dependencies, but still reported an error after modification

rustqemuriscvinstruction-setriscv32

Score: 0

Answers: 0

Daniel Gartmann

Reputation: 13048

Which arithmetic instruction set operation is the slowest and the fastest? Are there any ranking? Benchmarks?

performanceassemblyx86benchmarkinginstruction-set

Score: 1

Answers: 2

Jacob Miller

Reputation: 37

What does "trap entry point" means?

computer-scienceinterruptvirtualizationinstruction-set

Score: -1

Answers: 1

jwkoo

Reputation: 2653

Why are RISC-V S-B and U-J instruction types encoded in this way?

assemblyencodingriscvmachine-codeinstruction-set

Score: 19

Answers: 2

UndercoverCoder

Reputation: 1013

What does `b .` mean in this ASSEMBLY code?

assemblyarmgnu-assemblerinstruction-set

Score: 8

Answers: 1

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StackOverflow Questions for Tag: instruction-set

Are additional opcodes in RISC-V instructions important?

Why is im2col-based 2d-convolution more efficient than naive SIMD-accelerated 2d-convolution?

Are SIMD and VLIW instructions the same thing?

Why can&#39;t we have a safe ISA?

Which factors affect the needed compiler?

What do the abbreviations (Rn, Rd, ...) in the instruction set of ARM mean?

Do I need to make multiple executables for targeting different instruction sets?

Does FADDP ST(0), ST(1) make sense?

Determine target ISA extensions of binary file in Linux (library or executable)

Why are there no NAND, NOR and XNOR instructions in X86?

What is the difference between Processor Status Word (PSW) and Program Status Word (PSW)?

is x86-64 is just an alias name of EM64T?

Why Did LOCK-prefixed Instructions Become Preferred Over MFENCE for Memory Fences in the JVM on x86?

What&#39;s the purpose of the rotate instructions (ROL, RCL on x86)?

x86 rep prefix with a count of zero: what happens?

&quot;unresolved import &lt;my crates in project&gt;&quot; in Rust. Suspected to be caused by circular dependencies, but still reported an error after modification

Which arithmetic instruction set operation is the slowest and the fastest? Are there any ranking? Benchmarks?

What does &quot;trap entry point&quot; means?

Why are RISC-V S-B and U-J instruction types encoded in this way?

What does `b .` mean in this ASSEMBLY code?

Why can't we have a safe ISA?

What's the purpose of the rotate instructions (ROL, RCL on x86)?

"unresolved import <my crates in project>" in Rust. Suspected to be caused by circular dependencies, but still reported an error after modification

What does "trap entry point" means?