Reputation: 3
I'm attempting to create a makefile for a project with the following structure:
/
|-/src
|-objects_file.cpp
|-objects_file.hpp
|-/testing
|-test_objects.cpp
Assuming I have both Object1 and Object2 in the objects_file, would my makefile look like:
test_objects: objects_file.o
$(CC) -o test_objects.bin ./testing/test_objects.cpp *.o
or
test_objects: Object1.o Object2.o
$(CC) -o test_objects.bin ./testing/test_objects.cpp *.o
And yes, I realize that having multiple objects in the same file is not ideal nor standard.
Upvotes: 0
Views: 1431
Reputation: 99094
Assuming that the code in test_objects.cpp
tests the code in objects_file.cpp
, the makefile ought to contain a rule like this:
test_objects: test_objects.o objects_file.o
$(CC) -o test_objects.bin $^
(Note the automatic variable $^
which contains all of the prerequisites, in this case test_objects.o objects_file.o
.)
It doesn't matter how many classes are in objects_file
.
Upvotes: 0
Reputation: 5369
Object file and C++ object are not related. So, makefile wil not bother about how many C++ objects are placed inside an obj file.
Upvotes: 2