Drawkcab Esrever
Drawkcab Esrever

Reputation: 141

Changes to files unrecognized by makefile

Because of how my makefile written each time I make a change to a file and then 'make' it as if I didnt make any changes. For example........

When I make a change to Unit.cpp then 'make' i receive this message

make: Nothing to be done for `all'.

Currently I have to do 'make clean' then 'make' in order for the changes to be recognized. I know this is probably an idiotic way to do things and I am wondering how I can modify my make file so that I dont need to recompile all the files each time I make a change.

#makefile
# \ for line break
# this is variable for which compiler to use
CC = g++
CFLAGS = -c -Wall 
OBJFILES = main.o UnitList.o Unit.o  Write.o
# this is the name of target program
TARGET = run

all: $(TARGET) 

$(TARGET): $(OBJFILES)
    $(CC) $(OBJFILES) -o $(TARGET)

main.o:
    $(CC) $(CFLAGS) main.cpp

UnitList.o: 
    $(CC) $(CFLAGS) UnitList.cpp 

Unit.o:
    $(CC) $(CFLAGS) Unit.cpp

Write.o:
    $(CC) $(CFLAGS) Write.cpp

clean:
    rm -f $(OBJFILES) $(TARGET)

Upvotes: 1

Views: 48

Answers (1)

You need to list all the dependencies in your makefile.

For example, this:

main.o:
    $(CC) $(CFLAGS) main.cpp

should have main.cpp in the dependency list:

main.o: main.cpp
    $(CC) $(CFLAGS) main.cpp

Then, when you change main.cpp, make knows to re-make main.o.

Upvotes: 1

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