CODEWITHSUNDEEP
vhdl
Tomer Polski
Tomer Polski

Reputation: 41

Can't resolve multiple constant drivers for net

I wrote this code. I want to count the numbers that I pressed they key_0 and if I press 2 times then the red led will turn on, how ever I get this error:

Can't resolve multiple constant drivers for net.

The thing is that I try to torn on 2 process at the same time how ever this tow process have the same variable: duty_cycle_counter.

What is the problem? 

library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;

entity Pwm_control is

  generic(display_resolution : INTEGER := 8);

  port(
    key_0     : in  BIT;
    green_led : out BIT;
    red_led   : out BIT
  );
end Pwm_control;

architecture Behavioral of Pwm_control is

  signal counter         : std_logic_vector(display_resolution downto 0);
  signal general_counter : std_logic_vector(23 downto 0); -- general_counter is for the clock divider , can get till 23 

  signal step_10_dc         : STD_LOGIC_VECTOR(8 downto 0); --10 step PWM 
  signal step_5_dc          : STD_LOGIC_VECTOR(8 downto 0); --5 step PWM 
  signal starting_value_0   : STD_LOGIC_VECTOR(8 downto 0); --0 step PWM 
  signal duty_cycle_counter : STD_LOGIC_VECTOR(8 downto 0);

begin
  starting_value_0   <= "000000000";
  step_5_dc          <= "000011010";
  step_10_dc         <= "000110011";
  duty_cycle_counter <= "000000000";

  key_testing : process(key_0)        -- 
  begin
    if (key_0 = '0') then
      green_led          <= '1';
      duty_cycle_counter <= (duty_cycle_counter + step_5_dc);
    else
      green_led <= '0';
    end if;

  end process key_testing;

  key_test_red_led : process(duty_cycle_counter)
  begin
    if (step_10_dc <= duty_cycle_counter) then
      red_led <= '1';
    end if;
  end process key_test_red_led;

end Behavioral;

Upvotes: 0

Views: 278

Answers (1)

Yann Vernier
Yann Vernier

Reputation: 15887

You're driving duty_cycle_counter continuously with 0 and trying to update it in the key_testing process. It looks like you wanted a start value (possible in most RAM-based FPGAs) or a reset, though in real life it will have some value so you could just leave out the initialization.

Upvotes: 1

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