Reputation: 2531
I thought that I could use the define
directive in make to make multiple alike rules
define TESTPRG
${1}:
echo Build ${1}
endef
$(call TESTPRG,x)
But I get this output
$ make
make: *** No rule to make target 'echo', needed by '
x'. Stop.
It looks like the newline in my define is lost
$ make -n -p | grep echo
make: *** No rule to make target 'echo', needed by '
x'. Stop.
echo Build ${1}
x: echo Build x
echo:
Am I just trying to do something that the define
is not supposed to be used for.
Kjeld
Upvotes: 1
Views: 282
Reputation: 4261
This is exactly what define
is supposed to be used for. You just need to remember to $(eval)
it as a part of Makefile:
$ cat Makefile
define TESTPRG
${1}:
echo Build ${1}
endef
$(eval $(call TESTPRG,x))
$ make
echo Build x
Build x
Upvotes: 4