CODEWITHSUNDEEP
assemblyencodingarm
Kareem
Kareem

Reputation: 15

Encoding ARM assembly instruction to ARM machine language

I'm having trouble encoding ARM assembly instruction to ARM machine language

CMN r9,r10,ROR r11

Converting ROR r11 in specific, to literal operand (alignment and the 8 bit immediate code)

Upvotes: 1

Views: 673

Answers (1)

old_timer
old_timer

Reputation: 71576

Since you did finally solve this mostly on your own:

so.s

CMN r9,r10,ROR r11

assemble into machine code in an object file and then disassemble that

arm-none-eabi-as so.s -o so.o
arm-none-objdump -d so.o

so.o:     file format elf32-littlearm


Disassembly of section .text:

00000000 <.text>:
   0:   e1790b7a    cmn r9, r10, ror r11

From that

CMN r9,r10,ROR r11
.inst 0xe1790b7a

Disassembly of section .text:

00000000 <.text>:
   0:   e1790b7a    cmn r9, r10, ror r11
   4:   e1790b7a    cmn r9, r10, ror r11

from the arm documentation.

CMN (register-shifted register)
CMN<c> <Rn>, <Rm>, <type> <Rs>
[cond]00010111[rn]0000[rs]0[type]1[rm]

rn is r9 so 1001
rm is r10 so 1010
rs is r11 so 1011

[cond]00010111[1001]0000[1011]0[type]1[1010]

condition is always so 1110
type is ror so 11

[1110]00010111[1001]0000[1011]0[11]1[1010]
1110000101111001000010110111010
1110 0001 0111 1001 0000 1011 0111 1010
0xE1790B7A

as fast as you can type/write it down you can encode it.

Only if doing it by hand and using the tool doesn't match then you need to figure out why. Rare occasions it is the documentation see if you can find an older newer one from the processor folks, not some third party thing. Or if it doesn't then match perhaps you are looking at the wrong instruction description see how the disassembly compares to the documentation to figure out the encoding. (or you are using the tool wrong in some way or wrong tool). Only if it does not match at all and you can't figure it out does it become a Stack Overflow question, well first a support question to the chip/core tech support, then after that a place like here.

Upvotes: 3

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