Reputation: 59
I understand how sequentially iterating over data utilizes cpu cache. I do not understand how multiple data sets are loaded into cache. In this scenario, is data from array 2 in higher level cache along with array 1? Assume array 2 can fit entirely on cpu cache, but not array 1; it must be loaded in blocks.
If iterating only over array 1, all levels of cache are filled with blocks of its data. But I don't get what happens when 2 data sets need to interact, one of them non-sequentially?
I am looking for a way to have both data sets in cache (l2) so I don't have to go to RAM for each random access, or if this is not possible, can you please explain this?
Thank you.
Upvotes: 0
Views: 1102
Reputation: 4680
The whole array will not be loaded entirely so its length does not really matter. When you access an element of an array a cache line will be loaded that contains a copy of the memory around that element. A cache line is usually 64 bytes on x86 systems.
If the cpu pre-fetcher detects an access pattern it will pre-fetch the next cache line (or two). Assuming that no other processes are running and using your L1 cache you will have enought space for cache lines from both arrays if the pre-fetcher is able to detect access patterns on both of them.
In your case if the access in array 2 depends on a value in array 1 it is unlikely that an access pattern for array 2 will be able to be determined as the accesses will not be sequential.
Upvotes: 4