CODEWITHSUNDEEP
sdkembeddedfpgaxilinxzynq
ihsan
ihsan

Reputation: 1

How to send data to custom stream IP from memory through DMA in Xilinx SDK?

I have created two custom stream IO in Vivado HLS by following this tutorial: https://www.youtube.com/watch?v=3So1DPe2_4s, concat and slice ips.

I created block design following this tutorial https://www.youtube.com/watch?v=R8MSpEU7UKE.

I want to send data from Zynq PS to my IPS through AXI DMA, and then I want to write the same data to DDR in Zynq PS. How can I do that in Xilinx SDK? My_Block_Diagram

Upvotes: 0

Views: 566

Answers (1)

domitilo
domitilo

Reputation: 16

It's quite a general question. Without more information about your specific problem..

Have you read the DMA product guide? (PG021 document from Xilinx). It describes how to use that IP Core, including section 'Example Design', 'Design flow steps' and 'designing with the core'

Upvotes: 0

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