Does memory-mapped I/O work by using RAM addresses?

Question

Imagine a processor capable of addressing an 8-bit range (I know this is ridiculously small in reality) with a 128 byte RAM. And there is some 8-bit device register mapped to address 100. In order to store a value to it, does the CPU need to store a value at address 100 or does it specifically need to store a value at address 100 within RAM? In pseudo-assembly:

STI 100, value

VS

STI RAM_start+100, value

Answer 1

If you access address 100, you can't tell it is ram or an i/o address.

Memory mapped I/O is the norm. You have specifically mentionned memory mapped. So if you access a memory location, identified with its address you address whatever is located there, be it RAM or I/O.

You have read to much Intel documentation. Special instruction to address i/o is a weird invention and only advantageous for tiny address spaces, similar to use a separate address space for stacks.

Answer 2

Usually, the address of a device is specified relative to the start of the address space it lives in.
The datasheet has surely more context and will clarify if the address is relative to something else.

However, before using it you have to translate that address as the CPU would see it.

For example, if your 8-bit address range accessible with the sti instruction is split in half:

1. 0-127 => RAM
2. 128-255 => IO

Because the hardware is wired this way, then, as seen from the CPU, the IO address range starts at 128, so an IO address of x is accessible at 128 + x.

The CPU datasheet usually establishes the convention used to give the addresses of the devices and the memory map of the CPU.

Address spaces can be hierarchical (e.g. as in PCI) or windowed (e.g. like the legacy PCI config space on x86), can have aliases, they may require special instructions or overlaps (e.g. reads to ROM, writes to RAM).

Always refers to the CPU manual/datasheet to understand the CPU memory map and how its address range(s) is (are) routed.