CODEWITHSUNDEEP
fpgalattice-diamond
smcmurphy
smcmurphy

Reputation: 1

Lattice Diamond programmer, FPGA wont load from flash on power cycle

We have a design that has worked for years when programming with the Diamond WIn7 software. We are using the Advanced FPGA loader feature of the Diamond programming software in WIN10(v.3.12) now. We program the CPLD (LCMXO2-640ZE)with our .JED first, bypass the LFE3-35EA using the normal FLASH,erase,program, verify function of Flash programming mode. Then we use the Advanced flash programming (FPGA Loader) and give our S29GL064N a loader file and the .BIT file. Both program "successfully" according to software. Historically we were done..Power down, power back on and FPGA was loaded with our project on power up from flash. Now... the file is not loading the FPGA on power cycle. Yet, when we shove the .BIT file directly into FPGA the board is seen and design verifies. Lattice Tech support has ignored us for over 4 months, any ideas would be extremely helpful as we have made our own programming state machine at this point and gone over all pertinent datasheets and basically arrived right back to square one. Thanks

We have tried changing programming speed settings, I/O settings in the Diamond software utility. We have triggered our state machine to wait for power to be good before starting. All hardware is verified good as we are using a known good design for many years. We havent changed anything in the design except updated to Diamond WIN10.

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