Why does Intel x86 manual use +rd instead of +ro or +rq for 64-bit registers?

Question

The description of the PUSH instruction in the Intel manual (PDF, Volume 2, Chapter 4.3, PUSH) contains the line 50+rd PUSH r64. It seems +rd is used throughout most of the instruction descriptions for both 32-bit and 64-bit registers. However, according to Table 3-1. Register Codes Associated With +rb, +rw, +rd, +ro, +rd refers to 32-bit registers and +ro to 64-bit ones.

Additionally, the columns for the two widths are different. +rd contains ESP, EBP, ESI, EDI twice while +ro has N/A in their place.

Is this an oversight in the manual or is there some deeper meaning behind it?

The AMD manual (PDF, Volume 3, Chapter 3, PUSH) uses +rq for 64-bit registers when describing instructions using them. My confusion is twofold:

• The q in +rq seems to mean quadword which is consistent with 64-bit width. Is there any reason intel uses +ro?
• Why are some lines repeated in table 3-1 for 32-bit registers and why are they not repeated for 64-bits?

I am tempted to just assume this is an error in the Intel manual and follow AMD's descriptions but I want to double check.