Tiva C DevBoard - Microcontroller doesn't enter main function

Question

I am working with a Tiva C EK-TM4C123GXL development board (MCU -> TM4C123GH6P). I am using Keil uVision 5, ARM compiler 6.12 and CMSIS pack for this specific microcontroller. My code is following:

#include "TM4C123GH6PM.h"  // CMSIS-compatible interface

#include <stdint.h> // C99 standard integers

#define LED_RED   (1U << 1)
#define LED_BLUE  (1U << 2)
#define LED_GREEN (1U << 3)

void delay(int volatile iter);

int main(void) {

    SYSCTL->RCGCGPIO  |= (1U << 5); /* enable AHB for GPIOF */
    SYSCTL->GPIOHBCTL |= (1U << 5); /* enable clock for GPIOF */

    /* configure LEDs (digital output) */
    GPIOF_AHB->DIR |= (LED_RED | LED_BLUE | LED_GREEN);
    GPIOF_AHB->DEN |= (LED_RED | LED_BLUE | LED_GREEN);

    /* turn all LEDs off */
    GPIOF_AHB->DATA_Bits[LED_RED | LED_BLUE | LED_GREEN] = 0U;

    GPIOF_AHB->DATA_Bits[LED_BLUE] = LED_BLUE;
    while (1) {
        GPIOF_AHB->DATA_Bits[LED_RED] = LED_RED;
        delay(500000);

        GPIOF_AHB->DATA_Bits[LED_RED] = 0;

        delay(250000);
    }
    return 0; // unreachable code
}

void delay(int volatile iter) {
    while (iter > 0) {  // delay loop
        --iter;
    }
}

After building, I'm getting the following warning, but I am able to load the code:

.\RTE\Device\ARMCM0\ARMCM0_ac6.sct(19): warning: L6314W: No section matches pattern *(.bss.noinit).

Debug session starts with entering Reset_Handler (inside startup file):

Reset_Handler   PROC
                EXPORT  Reset_Handler             [WEAK]
                IMPORT  SystemInit
                IMPORT  __main
                LDR     R0, =SystemInit
                BLX     R0
                LDR     R0, =__main
                BX      R0
                ENDP

Function SystemInit executes without any problem, but when it comes to executing __main, program jumps to HardFault_Handler and stays in forever loop. So far I tried to modify stack size but that gave no result. Similarly, I modified heap size, but the problem remained. I tried working with IAR, but the problem became even worse.

Searching the Internet I concluded that many people had similar problem with same DevBoard, but I still can't find the solution.

Answer 1

Most likely yuor project is not set correctly and you do not compile for the correct MCU:

1. .\RTE\Device\ARMCM0\ARMCM0_ac6.sct(19): your MCU is M4 and this message indicated thet you use some M0 scatter files.

2. Test if LDR R0, =__main load R0 with the address having LSB set (to indicate thumb mode). If it is not then you do not compile in thumb mode.

3. Check the reason for HF (replace printf with anything you have available) - even just place breakpoint and see what is executed

// Base address for System Control Space (SCB)
#define SCB_BASE 0xE000ED00

// Registers for fault status
#define SCB_HFSR   (*(volatile uint32_t *)(SCB_BASE + 0x02C)) // Hard Fault Status Register
#define SCB_CFSR   (*(volatile uint32_t *)(SCB_BASE + 0x028)) // Configurable Fault Status Register
#define SCB_MMAR   (*(volatile uint32_t *)(SCB_BASE + 0x034)) // Memory Management Fault Address Register
#define SCB_BFAR   (*(volatile uint32_t *)(SCB_BASE + 0x038)) // Bus Fault Address Register
#define SCB_AIRCR  (*(volatile uint32_t *)(SCB_BASE + 0x00C)) // Application Interrupt and Reset Control Register

void displayHardwareFaultReason()
{

    // Read the Hard Fault Status Register (HFSR)
    uint32_t hfsr = SCB_HFSR;
    if (hfsr & (1 << 30))
    {
        printf("FORCED: A configurable fault (such as usage, bus, or memory fault) escalated to hard fault.\n");

        // Read the Configurable Fault Status Register (CFSR)
        uint32_t cfsr = SCB_CFSR;

        // Check memory management faults
        if (cfsr & 0xFF) // MMFSR: Bits [7:0]
        {
            printf("Memory Management Fault Detected:\n");
            if (cfsr & (1 << 0)) printf("  IACCVIOL: Instruction access violation.\n");
            if (cfsr & (1 << 1)) printf("  DACCVIOL: Data access violation.\n");
            if (cfsr & (1 << 3)) printf("  MUNSTKERR: Unstacking error during exception return.\n");
            if (cfsr & (1 << 4)) printf("  MSTKERR: Stacking error during exception entry.\n");
            if (cfsr & (1 << 7))
            {
                printf("  MMARVALID: MMAR contains the address of the faulting access: 0x%08X\n", SCB_MMAR);
            }
        }

        // Check bus faults
        if (cfsr & 0xFF00) // BFSR: Bits [15:8]
        {
            printf("Bus Fault Detected:\n");
            if (cfsr & (1 << 8)) printf("  IBUSERR: Instruction bus error.\n");
            if (cfsr & (1 << 9)) printf("  PRECISERR: Precise data bus error.\n");
            if (cfsr & (1 << 10)) printf("  IMPRECISERR: Imprecise data bus error.\n");
            if (cfsr & (1 << 11)) printf("  UNSTKERR: Unstacking error during exception return.\n");
            if (cfsr & (1 << 12)) printf("  STKERR: Stacking error during exception entry.\n");
            if (cfsr & (1 << 15))
            {
                printf("  BFARVALID: BFAR contains the address of the faulting access: 0x%08X\n", SCB_BFAR);
            }
        }

        // Check usage faults
        if (cfsr & 0xFFFF0000) // UFSR: Bits [31:16]
        {
            printf("Usage Fault Detected:\n");
            if (cfsr & (1 << 16)) printf("  UNDEFINSTR: Undefined instruction.\n");
            if (cfsr & (1 << 17)) printf("  INVSTATE: Invalid state.\n");
            if (cfsr & (1 << 18)) printf("  INVPC: Invalid program counter.\n");
            if (cfsr & (1 << 19)) printf("  NOCP: No coprocessor available.\n");
            if (cfsr & (1 << 24)) printf("  UNALIGNED: Unaligned memory access.\n");
            if (cfsr & (1 << 25)) printf("  DIVBYZERO: Division by zero.\n");
        }
    }
    else if (hfsr & (1 << 1))
    {
        printf("VECTBL: Bus fault on vector table read during exception processing.\n");
    }
    else
    {
        printf("No forced faults detected.\n");
    }

}