CODEWITHSUNDEEP
linuxcompilationgnu-make
dimba
dimba

Reputation: 27581

Setting make variable inside target

Given GNU Make 3.81.

The below makefile

all:
        echo before
TEST=1
        echo after

yields "commands commence before first target. Stop." on "TEST=1" line.

From other side adding "override" to TEST as following:

all:
        echo before
override TEST=1
        echo after

runs fine (both before and "after" are "printed").

Questions:

  1. Why "TEST=1" is not ok, while "override TEST=1" is ok?

  2. Why "override TEST=1" inside target's command is fine? Proba

Upvotes: 1

Views: 738

Answers (1)

0xC0000022L
0xC0000022L

Reputation: 21289

My guess would be that

override TEST=1

gets interpreted as:

override: TEST=1

... which is perfectly valid in GNU make.

You can modify variables per-target simply by naming the target and then setting the variable as you would in the global section of the make file, such as this:

<target>: <variable>:=<value>
<target>: <variable>=<value>
<target>: <variable>+=<value>

This way it is common-place to append something to or modify CFLAGS for just a single object file ...

NOTE: However, it is wrong syntax to make a variable assignment within the command-block of a target as you were trying.

Upvotes: 1

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