CODEWITHSUNDEEP
cmakefile
louxiu
louxiu

Reputation: 2915

makefile include *.h file in other directory

Since the *.o, *.h file and *.c files are stored in different directories, do I need add prefix $(ODIR) or $(IDIR) everytime I write a *.o or *.h file?

Is there a graceful way to do it?

Perhaps some way like $(IDIR)/{a.h, b.h, c.h}?

This is the sample of makefile:

GCC = gcc
CFLAGS = 
CFLAGS_DEBUG_STRICT = -Wall pedantic -ansi -ggdb -DDEBUG 
CFLAGS_DEBUG = -Wall -ggdb -DDEBUG
LFLAGS = 
SDIR = ../src
ODIR = obj
IDIR = ../include
INCLUDES = 
LIDR = ../lib/
LIBS = 
all : keyword_match_test
keyword_match_test : $(ODIR)/keyword_match_test.o $(ODIR)/keyword_match.o 
  $(GCC) $(CFLAGS_DEBUG) -o $@ $+ 

$(ODIR)/keyword_match_test.o : keyword_match_test.c $(IDIR)/keyword_match.h
  $(GCC) $(CFLAGS_DEBUG) -c -o $@ $< -I$(IDIR) 

$(ODIR)/keyword_match.o : $(SDIR)/keyword_match.c $(IDIR)/keyword_match.h  $(IDIR)/global.h
  $(GCC) $(CFLAGS_DEBUG) -c -o $@ $< -I/usr/include/mysql -I$(IDIR)

Upvotes: 0

Views: 1403

Answers (2)

thiton
thiton

Reputation: 36059

In addition to @macs suggestion with explicitely placed object files, GNU make's vpath directive can help you:

vpath %.h $(IDIR)
vpath %.o $(ODIR)

$(ODIR)/keyword_match_test.o : keyword_match_test.c keyword_match.h

Upvotes: 1

Sebastian
Sebastian

Reputation: 8164

You can do something like this:

C_SRC = foo.c bar.c
C_OBJ = $(C_SRC:%.c=../obj/%.o)
INCLUDES = $(wildcard *.hpp) $(wildcard *.h) $(wildcard ../../general/*.hpp)

$(C_OBJ): $(C_SRC)
          $(C) $(CFLAGS) -o $(C_OBJ) -c $(C_SRC)

Note the ../obj/ at C_OBJ. So you're giving all source files to the Makefile and it automatically replaces the extensions *.c with *.o and the required directory. You can do the same for includes, or use a wildcard as shown.

Upvotes: 0

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