StackOverflow Questions for Tag: micro-optimization

Chayim Friedman

Reputation: 71430

What is causing the store latency in this program?

cx86-64cpu-architecturemicro-optimizationmicro-architecture

Score: 4

Answers: 2

no comment

Reputation: 10465

Why is `if x is None: pass` faster than `x is None` alone?

pythonperformancecpythonmicro-optimizationpython-internals

Score: 5

Answers: 2

njuffa

Reputation: 26195

Optimized 53->32 bit modulo computation on 32-bit processors

calgorithmmicro-optimizationinteger-division

Score: 4

Answers: 1

Guy B

Reputation: 415

Is using AVX2 can implement a faster processing of LZCNT on a word array?

x86simdavxmicro-optimizationavx2

Score: 9

Answers: 2

MaiaVictor

Reputation: 53037

Is it possible to check if 2 sets of 3 ints have at least one element in common with less than 9 comparisons?

cperformancebit-manipulationmicro-optimization

Score: 12

Answers: 5

user15150266

Reputation: 65

How can I g_signal_connect() by ID rather than string name?

cgtkmicro-optimization

Score: 1

Answers: 1

ugo_capeto

Reputation: 338

x86 assembly abs() implementation? (revisited)

assemblygccx86-64micro-optimizationabsolute-value

Score: 0

Answers: 0

Jimbo

Reputation: 3294

what's the difference between _mm256_lddqu_si256 and _mm256_loadu_si256

x86simdintrinsicsavxmicro-optimization

Score: 17

Answers: 1

matrixMule

Reputation: 11

How to group static/global variables together for improved cache locality in C++

c++cachingmicro-optimizationmemory-layout

Score: 1

Answers: 0

Viktor Sehr

Reputation: 13099

Why doesn't the C++ standard library utilize likely/unlikely attributes?

c++algorithmcompiler-optimizationmicro-optimizationlikely-unlikely

Score: 3

Answers: 1

Juliean

Reputation: 1180

LEA vs MOV imm64 for loading address-constant into register

assemblyx86-64micro-optimization

Score: 5

Answers: 2

sadljkfhalskdjfh

Reputation: 797

Test whether a register is zero with CMP reg,0 vs OR reg,reg?

assemblyoptimizationx86micro-optimization

Score: 23

Answers: 2

Thomas O

Reputation: 6240

Divide by 10 using bit shifts?

mathbitmicro-optimizationlow-levelinteger-division

Score: 65

Answers: 11

Peter Cordes

Reputation: 365517

How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent

assemblyx86intelcpu-architecturemicro-optimization

Score: 53

Answers: 2

DarkAtom

Reputation: 3171

How to zero certain bytes of a register?

assemblygccx86x86-64micro-optimization

Score: 3

Answers: 0

Forward

Reputation: 965

Why does mulss take only 3 cycles on Haswell, different from Agner's instruction tables? (Unrolling FP loops with multiple accumulators)

cassemblyx86ssemicro-optimization

Score: 67

Answers: 1

DenverCoder9

Reputation: 495

Compiler optimization of if (loop invariant) if statement inside a loop

cloopsoptimizationcompiler-optimizationmicro-optimization

Score: 2

Answers: 5

njuffa

Reputation: 26195

Converting nucleobase representation from ASCII to UCSC .2bit

calgorithmbit-manipulationbioinformaticsmicro-optimization

Score: 5

Answers: 3

CPlus

Reputation: 4848

Can packing variables or parameters into structures/unions introduce unforseen performance penalties?

cgccstructmicro-optimizationswar

Score: 1

Answers: 1

sum1stolemyname

Reputation: 4550

Floating point division vs floating point multiplication

c++floating-pointmicro-optimization

Score: 110

Answers: 8

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StackOverflow Questions for Tag: micro-optimization

What is causing the store latency in this program?

Why is `if x is None: pass` faster than `x is None` alone?

Optimized 53-&gt;32 bit modulo computation on 32-bit processors

Is using AVX2 can implement a faster processing of LZCNT on a word array?

Is it possible to check if 2 sets of 3 ints have at least one element in common with less than 9 comparisons?

How can I g_signal_connect() by ID rather than string name?

x86 assembly abs() implementation? (revisited)

what&#39;s the difference between _mm256_lddqu_si256 and _mm256_loadu_si256

How to group static/global variables together for improved cache locality in C++

Why doesn&#39;t the C++ standard library utilize likely/unlikely attributes?

LEA vs MOV imm64 for loading address-constant into register

Test whether a register is zero with CMP reg,0 vs OR reg,reg?

Divide by 10 using bit shifts?

How exactly do partial registers on Haswell/Skylake perform? Writing AL seems to have a false dependency on RAX, and AH is inconsistent

How to zero certain bytes of a register?

Why does mulss take only 3 cycles on Haswell, different from Agner&#39;s instruction tables? (Unrolling FP loops with multiple accumulators)

Compiler optimization of if (loop invariant) if statement inside a loop

Converting nucleobase representation from ASCII to UCSC .2bit

Can packing variables or parameters into structures/unions introduce unforseen performance penalties?

Floating point division vs floating point multiplication

Optimized 53->32 bit modulo computation on 32-bit processors

what's the difference between _mm256_lddqu_si256 and _mm256_loadu_si256

Why doesn't the C++ standard library utilize likely/unlikely attributes?

Why does mulss take only 3 cycles on Haswell, different from Agner's instruction tables? (Unrolling FP loops with multiple accumulators)