CODEWITHSUNDEEP
linkermakefile
jkayca
jkayca

Reputation: 241

Make or Shell Variables In Linker Script

Is it possible for a linker script to access makefile/shell variables and make a decision based on the said variable?

For example, suppose I want to change the start of the RAM area below without using a different linker script, would it be possible to use a make variable to do this?

MEMORY
{
ifeq ($(SOME_VAR),0)
RAM (wx) : ORIGIN = 0x100000, LENGTH = 128K
else
RAM (wx) : ORIGIN = 0x200000, LENGTH = 128K
endif
}

Upvotes: 9

Views: 3356

Answers (3)

John
John

Reputation: 3520

ld does not import any variables from the environment, so it cannot use them directly. The best way to do this is to create your own linker script with the environment variables you want to export, and have the original linker script include it as so:

makefile:

foo:
    echo SOMEVAR=$(SOMEVAR) > environment_linker_script
    ld ...

enviroment_linker_script:

SOMEVAR=xxx

master_linker_script:

include environment_linker_script

ifeq ($(SOME_VAR),0) ...

Upvotes: 6

stefanct
stefanct

Reputation: 2944

If the solution of deciding within the makefile which one of several linker scripts is not sufficient, then generating the script within make might be a viable option.

This solution relies on GNU make's verbatim variables, which get exported to environment variables and are referenced with $$. I am using this for defining a path variable to be used to include a linker script in another linker script like so:

define LDSCRIPT_DEF
/* Include the original libopencm3 linker script */
INCLUDE $(OPENCM3_DIR)/lib/stm32/f4/stm32f405x6.ld

/* Do custom stuff */
endef
export LDSCRIPT_DEF

$(LDSCRIPT):
    @echo "$$LDSCRIPT_DEF" > $(LDSCRIPT)

Explanation: this is a part of the makefile and only works if the makefiles use $(LDSCRIPT) as a prerequisite in all relevant rules.

Upvotes: 0

ThePosey
ThePosey

Reputation: 2734

I doubt it although it would depend on the linker you're using. It might be possible for the linker to read some exported variables from make but as I said all this would be dependent on specific linker functionality. Another idea could be as long as the linker file isn't going to be too complicated one option would be to actually generate it using your makefile. There are many examples you could google for about having makefiles generate header files, you could follow the same path for generating a linker file.

Upvotes: 0

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