Reputation: 169
I am new to VHDL and FPGA. I have written a sample code which does EXOR of a
and b
and stores it in c
. This code is in VHDL behavioral architecture. I am using Quartus 11.1+SP2-2.11
.
I assigned pins say a
to SW0
, b
to SW1
and c
to LEDG0
. Everything is compiling and there are no errors. I go to Tools->Programmer
. I have my FPGA in RUN mode
. Mode in Programmer is JTAG
and hence the Hardware setup is USB-Blaster [PORT 0]
. When I load the .sof
file and Click "Start", the progress says "failed". I do not know why.
I tried to search everywhere, but all tutorials or links give the same explanation. I guess there are hardly any who encountered this problem. I want to know if I am missing something. I want to get my fundamentals right!
Upvotes: 3
Views: 7770
Reputation: 169
There can be multiple reasons as to why the loading of .sof to FPGA fails. I figured out the following for my device. If any of you are beginners, please follow the same:
1) Make sure you have the data sheet of your device with you. I followed a tutorial and entered the device number they mentioned not the one I had.
2) Check for pin assignments. This is the most important. I found out the Pins used for various switches and LEDs in a consolidated document online.
3) If it still does not work, it is best to contact experts.
Upvotes: 1
Reputation: 26637
Is thee FPGA an Altera DE2? If yes, you can try with this file that works with the DE2 board so that you can know if it is your .sof file that needs to be changed. If the USB blaser appears in Quartus Programmer then most likely your driver is installed correctly and you should verify whether it is your .sof file that needs to change or something else.
Upvotes: 0
Reputation: 99
Are you by any chance using Linux? If you are make sure you've done this: http://www.alterawiki.com/wiki/Quartus_for_Linux#Setup_JTAG
Upvotes: 2