CODEWITHSUNDEEP
vhdl
user1796741
user1796741

Reputation: 93

Keep getting an error with array (control memory, vhdl)

I'm trying to implement control memory but I keep getting "Actual for index 32 is missing in array aggregate." error. This should be 256 x 28 control memory. Anyone know the reason in my code that causes this error?

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use
IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity control_memory is
    Port ( mw : out  STD_LOGIC;
           mm : out  STD_LOGIC;
           rw : out  STD_LOGIC;
           md : out  STD_LOGIC;
           fs : out  STD_LOGIC_VECTOR (4 downto 0);
           mb : out  STD_LOGIC;
           tb : out  STD_LOGIC;
           ta : out  STD_LOGIC;
           td : out  STD_LOGIC;
           pl : out  STD_LOGIC;
           pi : out  STD_LOGIC;
           il : out  STD_LOGIC;
           mc : out  STD_LOGIC;
           ms : out  STD_LOGIC_VECTOR (2 downto 0);
           na : out  STD_LOGIC_VECTOR (7 downto 0);
           in_car : in  STD_LOGIC_VECTOR (7 downto 0));
end control_memory;

architecture Behavioral of control_memory is
type mem_array is array(0 to 255) of STD_LOGIC_VECTOR(27 downto 0);

begin

memory_m : process(in_car) variable control_mem : mem_array:=(
    X"FFFFFFF",
    X"0000000",
    X"AAAAAAA",
    X"0000000",
    X"BBBBBBB",
    X"0000000",
    X"CCCCCCC",
    X"0000000",
    X"DDDDDDD",
    X"0000000",

    X"1111111",
    X"0000000",
    X"2222222",
    X"0000000",
    X"3333333",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",

    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",
    X"0000000",

    X"0000000",
    X"0000000");

variable addr : integer;
variable control_out : std_logic_vector(27 downto 0);

begin

    addr := conv_integer(in_car);
    control_out := control_mem(addr);
    MW <= control_out(0);
    MM <= control_out(1);
    RW <= control_out(2);
    MD <= control_out(3);
    FS <= control_out(8 downto 4);
    MB <= control_out(9);
    TB <= control_out(10);
    TA <= control_out(11);
    TD <= control_out(12);
    PL <= control_out(13);
    PI <= control_out(14);
    IL <= control_out(15);
    MC <= control_out(16);
    MS <= control_out(19 downto 17);
    NA <= control_out(27 downto 20);
    end process; 

end Behavioral;

Upvotes: 0

Views: 819

Answers (2)

user1818839
user1818839

Reputation:

Given these declarations,

type mem_array is array(0 to 255) of STD_LOGIC_VECTOR(27 downto 0);

memory_m : process(in_car) 
  variable control_mem : mem_array:=(
    X"FFFFFFF",
    ...
    X"0000000");

the aggregate used to initialise control_mem ought to supply 256 entries; apparently (I haven't counted!) it only supplies entries 0 to 31, hence the error you receive.

Easiest to supply the missing entries, using a default "others" clause.

memory_m : process(in_car) 
  variable control_mem : mem_array:=(
    X"FFFFFFF",
    ...
    X"0000000",
    others => X"0000000");

EDITED to show use of named association as David suggests.

Named association is useful in many places including procedure parameter lists. One good use is where - as here - the array is sparse, since only the interesting values need be explicitly set; the default "others" takes care of the rest.

memory_m : process(in_car) 
  variable control_mem : mem_array:=(
    0 => X"FFFFFFF",
    2 => X"AAAAAAA", 
    4 => X"BBBBBBB",
    ...
    14 => X"3333333",
    others => X"0000000");

Upvotes: 2

fru1tbat
fru1tbat

Reputation: 1625

Your assignment to the control_mem variable in your process is to an aggregate of 32 vectors. control_mem, however, is of type mem_array, which is an array of 256 vectors (0 to 255). You are therefore only assigning 0 to 31 (which is why 32 is missing, and so is every one after that as well).

Upvotes: 0

Related Questions