CODEWITHSUNDEEP
makefilegnu-make
DMH
DMH

Reputation: 192

Makefile that when I call a certain target it changes the value of a variable for just this case

Okay so I have this DEBUG := -g variable in my makefile. The thing is I want to call a target named Release so that I can compile my code for release(basically without the extra code for debugging). I thought I could simply reset the value of debug in the rule commands but it gives me an erro(error 127). Also how would I then make my makefile simply run the normal dependencies? Thanks

Upvotes: 0

Views: 35

Answers (2)

DMH
DMH

Reputation: 192

CC := arm-none-eabi-
CCC :=$(CC)gcc
CCAS :=$(CC)as
DEBUG :=-g
CFLAGS := -c -mapcs 
FLAGSDEPEND :=-MM -MF
LD := $(CC)ld

# $@ -> nome do alvo .. $^/$? lista de dependencias .. $* contêm o valor de % .. $< contêm a primeira dependencia
# Ao fazer -include $(DEPENDS) estou a forçar a verificação das dependências, "-" serve para que da primeira vez não ocorra um erro
# $(wildcard *.c) -> Pesquisa na pasta indicada por todos os ficheiros no formato indicado (*.c)
# $(patsubst %.o,%.d,$@) -> substitui tudo em $@ no formato %.o para %.d

# Pastas
DEPDIR := Depends/
OBJDIR := Object/
SOURCECDIR := Source/C/
SOURCEADIR := Source/Assembly/
LIBDIR := Library/
HEADIR := Header/

# Dependencias
SOURCEC := $(wildcard $(SOURCECDIR)*.c) # Todos ficheiros *.c 
SOURCEA := $(wildcard $(SOURCEADIR)*.S) # Todos os ficheiros *.S
OBJC := $(patsubst $(SOURCECDIR)%.c,$(OBJDIR)%.o,$(SOURCEC))    # Todos os ficheiros *.o gerados a partir de *.c
OBJA := $(patsubst $(SOURCEADIR)%.S,$(OBJDIR)%.o,$(SOURCEA))    # Todos os ficheiros *.o gerados a partir de *.S
DEPENDS := $(patsubst $(OBJDIR)%.o,$(DEPDIR)%.d,$(OBJC))    # Todos os ficheiros *.d gerados partir dos *.o gerados dos *.c


debug: $(OBJC) $(OBJA)

release: DEBUG:= 
release: $(OBJC) $(OBJA)
    @echo A compilar em modo $@

$(OBJDIR)%.o: $(SOURCECDIR)%.c
    @echo A compilar $*.c $@
    @echo $(patsubst $(OBJDIR)%.o,$(DEPDIR)%.d,$@)
    @$(CCC) $(DEBUG) $(CFLAGS) $< $(FLAGSDEPEND) $(patsubst $(OBJDIR)%.o,$(DEPDIR)%.d,$@) 
    @$(CCC) $(DEBUG) $(CFLAGS) $< -o $@

-include $(DEPENDS)

$(OBJDIR)%.o: $(SOURCEADIR)%.S
    @echo A compilar $*.S
    @$(CCAS) $(DEBUG) $< -o $@

.PHONY: clean 
clean:
    @echo A remover objectos e executáveis
    @ rm -rf $(OBJDIR)/*.o *.axf $(DEPDIR)/*.d
    @ ${make cleanTemp}

cleanTemp:
    @echo A remover ficheiros temporarios
    @ rm -rf */*/*~ */*~ *~

My makefile isn't updating the object files when I change the header files. I'm creating the dependency files every time theres compilation but it seems like the makefile just ignores it

Upvotes: 0

Beta
Beta

Reputation: 99094

Use a target-specific variable value:

DEBUG:= -g

Release: DEBUG:=
Release:
        @echo DEBUG is $(DEBUG)

other:
        @echo DEBUG is $(DEBUG)

Upvotes: 1

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