Reputation: 2722
Since in VHDL a process is a collection of sequential statements and if write more than one process these ones are executed concurrently is it possible to sync. them?
As example
architeture my_arch_is of my_entity is
begin
proc_1 : process(...)
begin
-- code
end process;
proc_2 : process(...)
begin
-- code
end process;
proc_3 : process(...)
begin
-- code
end process;
end architecture;
What i would like to achieve is the following, the process 1 is a kind of selector (i.e. it assigns a bit under a specific event) process 2 and 3 instead compute in parallel two possible result, basically i would like to compute the selector and both the results and using another vhdl construct say something like "if selector is 0 take the result of process 2, otherwise take the result of process 3", like a multiplexer.
Is it possible to do something like that (if it does make sense of course)?
Upvotes: 0
Views: 111
Reputation: 835
Yes, its possible. And if you use for example, a conditional statement for selecting one of the two results, given the bit value provided by process 1, it will actually be synthesized as a multiplexer.
Upvotes: 1