CODEWITHSUNDEEP
vhdl
user3724915
user3724915

Reputation: 31

Figuring out the size of the counter with a 50Mhz clock

I am trying to generate a wave of 15 ms. My clock is 50Mhz. What I did is T = 1/(50MHz) then 15ms / 50Mhz. I found that I need 750K period, but I am not sure how to translate that to code.

My code so far:

process (CLK, RESET) 
  variable COUNT_WAVE: integer range 0 to 750001; -- counter for wave generation 

  begin 
    if (RESET = '1') then PRESS <= '0'; 
    elsif clk'event and clk = '1' then I_PRESS <= PRESS; 

    if (I_PRESS = '1') then 
      case COUNT_WAVE IS -- Generating wave of 15 ms -- 
        when 0 => NC <= '0' AND NO <= '1' ; 
        when 1 to 750000 => NC <= '1' AND NO <= '0'; 
        when 750001 => NC <= '0' AND NO <= '1' ; 
      end case; 

      COUNT_WAVE := COUNT_WAVE + 1; 
    end if;

Upvotes: 0

Views: 561

Answers (2)

CJC
CJC

Reputation: 817

My opinion on this is first, get rid of reset from the sensitivity list. This creates a asynchronous reset which is not good if you are considering metastability.

I would recommend this article https:http://www.sunburst-design.com/papers/CummingsSNUG2003Boston_Resets.pdf if you are interested in knowing more.

My philosophy is dont make code more complicated than it needs to be, it should be simple but not simpler.

Break out your process into separate sections. Each process should do only a specific task.

That will make the code easier to read.

example: have one process to do only counting, start counting only if enable is on etc

have another process to look at the count value, and generate a 1 or 0 based on that.

Upvotes: 1

maxy
maxy

Reputation: 5457

I think your calculation is correct but the code has several problems.

  1. The COUNT_WAVE variable is an integer with a range constraint. I don't think you are allowed to overflow those. At least Modelsim/Questa will complain loudly if you do, and I assume the synthesis tools will not build a comparator for you. I think you have to overflow integer (as opposed to std_logic_vector or unsigned which always have a power-of-two range) manually with an if statement.

  2. It's bad practice to use variables to build registers. Anything that retains its state over clock cycles, e.g. COUNT_WAVE, should be a signal, not a variable.

  3. The use of PRESS and I_PRESS seems confused. If they are registers or outputs, you should assign something to them both during reset and on on the rising edge. If they are inputs, you shouldn't assign anything at all.

  4. when 0 => NC <= '0' AND NO <= '1' ; I have never seen this syntax, does that even compile? You probably want ; instead of AND.

Upvotes: 0

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