Reputation: 711
I'm trying to bit shift a value in verilog such that the replaced bits are 1's instead of 0's. i.e. I want to do 0001 << 1
such that it gives 0011
instead of 0010
Upvotes: 3
Views: 23667
Reputation: 1
function bit[31:0] cal_mask_value (int size);
bit [31:0] mask_value;
mask_value = 32'hFFFFFFFF << size;
mask_value = ~mask_value;
return mask_value;
endfunction
Upvotes: 0
Reputation: 1
We can use this,
a = (1'b1 << count) - 1;
Assign count to a value equal to the no.of 1's to be filled from LSB.
Upvotes: 0
Reputation: 13937
You could do this:
module ones_shift #(log2_width=2) (input [(2**log2_width)-1:0] A, input [log2_width:0] SHIFT, output [(2**log2_width)-1:0] As);
wire [(2**log2_width)-1:0] Ai, Ais;
assign Ai = ~A;
assign Ais = Ai << SHIFT;
assign As = ~Ais;
endmodule
ie BITWISE INVERT -> LOGICAL SHIFT LEFT -> BITWISE INVERT
This will work for any valid shift value.
http://www.edaplayground.com/x/YWK
Upvotes: 3
Reputation: 20514
To have the shift work with up to the number of bits the following example pre pads the input with 1's shifts then selects the MSBs:
localparam WIDTH = 4;
// Create temp with 1's as padding
wire [WIDTH*2 -1 :0] pad = {A, {4{1'b1}}};
wire [WIDTH*2 -1 :0] shift = pad << 1;
// Select MSB with 1's shifted in
wire [WIDTH-1 : 0] result = shift[WIDTH*2 -1 : WIDTH];
Upvotes: 0
Reputation: 431
the command '<<' you use, puts zeros for remaining bits. you can do like the following code:
imagine you have 4 bit variable (like your example) called A.
A = 4'b0000;
A = {A[2:0], 1'b1};
with concatenation you can put one's instead of zeros.
or you can use 'or' function for this issue:
A = (A << 1) | 4'b0001;
Upvotes: 10