Hundevadda
Hundevadda

Reputation: 1

Simple flag in VHDL [Error 10820]

I want to design a IIC sniffer in VHDL and I struggle at a very basic point.

To keep it "sequential" I want to set a flag after every part that will be executed by an entity.

Now I want to set a Flag on the START condition (SCL = HIGH & RISING_EDGE on SDA) This flag should be resetted on the STOP condition (SCL = HIGH & FALLING_EDGE on SDA) and when I push a reset button.

I now have the problem that I can not get the flag to be set by the START and resetted by the STOP command.

How should I approach to get a flag for this period?

entity scltest is
port(   scl, sda: in std_logic;
        scled, sdaled, flag: out std_logic
        );
end scltest;

architecture test of scltest is
begin 
scled <= scl;
sdaled <= sda;

process(sda)
begin
if (scl = '1' AND rising_edge(sda)) then
flag <= '1';
else
    if (scl = '1' AND falling_edge(sda)) then
    flag <= '0';
    end if;
end if;
end process;

end test;

This code does not work because: "Error (10820): Netlist error at scltest.vhd(18): can't infer register for flag because its behavior depends on the edges of multiple distinct clocks"

I do understand why it won't work but I can't think of a design that will work which gives me the same function.

Thank you in advance.

Upvotes: 0

Views: 2384

Answers (1)

FRob
FRob

Reputation: 4041

Your basic idea seems to be that you want to do all your logic with the bus clock. However, your design shouldn't depend entirely on the bus clocks -- especially since I²C is so slow.

You'll want to have a running system that can do other tasks (like USB, USART...) to report to your host system (PC, SoC...) about the state of the I²C bus.

Towards that end, you'll need to sample both SCL and SDA and have a core clocked by your system clock perform the actual anaylsis of rising/fallig edges, bus states etc. That way, all your logic will be synchronous to your system clock.

Depending on your development board, example designs might exist that already have the host side ready and you would only need to "plug" your module in the right place. A good starting point IMHO1 would be one of Digilent's Spartan boards as the host side code is freely available with tools and a programming API.

1 I'm not affiliated with Digilent in any way.

Upvotes: 0

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