Reputation: 85
I'm trying to implement the memory model as below, but I got these warning messages:
assign Data = (!CS && !OE) ? Mem[Address] : {WordSize{1'bz}};
|
ncelab: *W,BIGWIX (./sram.v,16|39): Memory index truncation.
Mem[Address] = Data;
|
ncelab: *W,BIGWIX (./sram.v,20|14): Memory index truncation.
Here is my code:
// RAM Model
//
module sram (Address, Data, CS, WE, OE);
parameter AddressSize = 2592;
parameter WordSize = 32;
input [AddressSize-1:0] Address;
inout [WordSize-1:0] Data;
input CS, WE, OE;
reg [WordSize-1:0] Mem [0:(1<<AddressSize)-1];
assign Data = (!CS && !OE) ? Mem[Address] : {WordSize{1'bz}};
always @(CS or WE)
if (!CS && !WE)
Mem[Address] = Data;
always @(WE or OE)
if (!WE && !OE)
$display("Operational error in RamChip: OE and WE both active");
endmodule
What does "Memory index truncation" mean?
Upvotes: 2
Views: 1585
Reputation: 62037
You can get more verbose help on any Cadence Incisive warnings using nchelp
:
nchelp ncelab BIGWIX
ncelab/BIGWIX =
A memory is being indexed. The index expression has a width
greater than a machine word, which is typically 32 bits.
Only 32 bits are used. This truncation may result in
undesired behavior.
As mentioned in the Comment, you probably do not want the Address input signal to be 2592 bits wide or your memory to have (1<<2592) locations.
Upvotes: 2