CODEWITHSUNDEEP
riscvinstructionsinstruction-sethexdump
murari Venki
murari Venki

Reputation: 11

How To generate hex files in RISC V?

I am trying to verify the RISC-V DUT with 32bit integer set instruction which is available at https://github.com/ucb-bar/vscale they have their inputs stored in memory as a hex file @ vscale/src/test/inputs/ ( from the above link). I would like to verify my set of instructions for which i need them to be in the hex format . For example my set of instructions are ( just mentioning briefly) ADD SW LW SUB

I would like to convert these set of instructions in hex format so that I can verify its functionality. Could anyone help me out on how to go about .... would be really helpful.

Upvotes: 0

Views: 4110

Answers (2)

Ömer GÜZEL
Ömer GÜZEL

Reputation: 165

I need the same job and find the way. I am sharing that maybe others can benefit. First, you should have riscv-gnu-toolchain to make the compilation and decompilation process. It can be found here. The instructions that you mentioned are assembly. So, you can compile by riscv64-unknown-elf-as and disassemble by riscv64-unknown-elf-objdump. The instructions used to get hex are below.

omerguzel@omerguzel-HP:~/temp$ ls
code
omerguzel@omerguzel-HP:~/temp$ cat code
addi x1,x2,123
nop
xor x3,x2,x1
omerguzel@omerguzel-HP:~/temp$ /opt/riscv/bin/riscv64-unknown-elf-as code
omerguzel@omerguzel-HP:~/temp$ /opt/riscv/bin/riscv64-unknown-elf-objdump -D --section .text a.out 

a.out:     file format elf64-littleriscv


Disassembly of section .text:

0000000000000000 <.text>:
   0:   07b10093            add ra,sp,123
   4:   00000013            nop
   8:   001141b3            xor gp,sp,ra
omerguzel@omerguzel-HP:~/temp$

you can extract the hex part yourself by using scripts. **

Second Method:

** The other way is implemented by using other compiler tools. The commands are below.

omerguzel@omerguzel-HP:~/temp$ ls
code
omerguzel@omerguzel-HP:~/temp$ cat code
addi x1,x2,123
nop
xor x3,x2,x1
nop
omerguzel@omerguzel-HP:~/temp$ /opt/riscv/bin/riscv64-unknown-elf-as code
omerguzel@omerguzel-HP:~/temp$ /opt/riscv/bin/riscv64-unknown-elf-objcopy -O binary a.out a.bin --strip-debug
omerguzel@omerguzel-HP:~/temp$ od -t x4 -An -w4 -v a.bin 
 07b10093
 00000013
 001141b3
 00000013
omerguzel@omerguzel-HP:~/temp$

Upvotes: 0

osgx
osgx

Reputation: 94465

vscale/src/test/inputs have several hex inputs with similar format: 32 hex chars per line (16 bytes, 4 of 4-byte words) and 8192 lines. For example: https://github.com/ucb-bar/vscale/blob/master/src/test/inputs/rv32ui-p-add.hex

000000000000000000010101464c457f
00000034000001000000000100f30002
00280001002000340001000000000d04
00000000000000000000000100020005
00000005000007500000075000000000
...

Such files are loaded by testbench module in verilog with $readmemh function: https://github.com/ucb-bar/vscale/blob/master/src/test/verilog/vscale_hex_tb.v

module vscale_hex_tb();

   localparam hexfile_words = 8192;
...
   initial begin
      $value$plusargs("max-cycles=%d", max_cycles);
      $value$plusargs("loadmem=%s", loadmem);
      $value$plusargs("vpdfile=%s", vpdfile);
      if (loadmem) begin
         $readmemh(loadmem, hexfile);
         for (i = 0; i < hexfile_words; i = i + 1) begin
            for (j = 0; j < 4; j = j + 1) begin
               DUT.hasti_mem.mem[4*i+j] = hexfile[i][32*j+:32];
            end
         end
      end
      $vcdplusfile(vpdfile);
      $vcdpluson();
      // $vcdplusmemon();
      #100 reset = 0;
   end // initial begin

The $readmemh is documented in http://verilog.renerta.com/mobile/source/vrg00016.htm http://fullchipdesign.com/readmemh.htm

.. $readmemh reads hexadecimal data. Data has to exist in a text file. White space is allowed to improve readability, as well as comments in both single line and block. The numbers have to be stored as ... hexadecimal values. The basic form of a memory file contains numbers separated by new line characters that will be loaded into the memory.

The test inputs are used to initialize embedded memory DUT.hasti_mem.mem.

To work with such files you should know the memory map used in this testbench. Some parts of the memory may be not the instructions, but data and some initialization vectors. If you want to disassemble some of files, convert hex into binary (there are parsers for perl or you can write converter in other language or use verilog's $writememb to convert). Then add header of any binary format supported by your riscv disassembler, like elf for riscv objdump, or no any header for radare2 (https://github.com/radare/radare2) with riscv support.

Upvotes: 1

Related Questions