FabienM
FabienM

Reputation: 3761

Function clogb2() generated by vivado can't synthesize with loop limit error

I'm trying to design an AXI_master peripheral with vivado. I used the axi peripheral generator in vivado menu and modified the vhdl code generated.

In vhdl code there is a function clogb2 declared with following code:

function clogb2 (bit_depth : integer) return integer is
    variable depth  : integer := bit_depth;
    variable count  : integer := 1;
begin
  for clogb2 in 1 to bit_depth loop  -- Works for up to 32 bit integers
    if (bit_depth <= 2) then
      count := 1;
    else
      if(depth <= 1) then
          count := count;
        else
          depth := depth / 2;
        count := count + 1;
        end if;
    end if;
  end loop;
  return(count);
end;

This works in simulation (GHDL) but fail in synthesis with error :

[Synth 8-403] loop limit (65538) exceeded

I tried to increase loop limit in vivado with following tcl command :

set_param synth.elaboration.rodinMoreOptions "rt::set_parameter max_loop_limit <X>"

As explained here, but vivado synthesize with an infinite time and never finish. Do you know how to solve this problem ?

Upvotes: 3

Views: 1561

Answers (4)

JHBonarius
JHBonarius

Reputation: 11281

You could also try a different path. Although floating point is not supported in logic (although support is increasing), it is allowed for internal calculations and such. (By at least Xilinx and Altera/Intel).

Try this:

use ieee.math_real.all;

function ceillog2(input : positive) return natural is
begin
    return integer(ceil(log2(real(input))));
end function;

Upvotes: 1

Matthew
Matthew

Reputation: 13987

This recursive version synthesises:

function clogb2 (bit_depth : integer) return integer is 
  begin
    if bit_depth <= 1 then
      return 0;
    else
      return clogb2(bit_depth / 2) + 1;
    end if;
  end function clogb2;

You can use it to dimension other things, eg

entity counter is
  generic (max_count : POSITIVE);
  port (clock, reset : in  std_logic;
        Q            : out std_logic_vector(clogb2(max_count) downto 0)  
       );
end;

or you can use it as combinational logic:

process (I)
begin
  O <= clogb2(I);
end process;

BTW: you would be better using an integer subtype for your input:

function clogb2 (bit_depth : positive) return integer is 
--                               ^
--                               |

Upvotes: 0

FabienM
FabienM

Reputation: 3761

Finally I found a solution that work by rewriting the function with a big case :

function clogb2 (bit_depth : integer) return integer is
 begin
     case bit_depth is
         when 0 to 2             => return( 1);
         when (2** 1)+1 to 2** 2 => return( 2);
         when (2** 2)+1 to 2** 3 => return( 3);
         when (2** 3)+1 to 2** 4 => return( 4);
         when (2** 4)+1 to 2** 5 => return( 5);
         when (2** 5)+1 to 2** 6 => return( 6);
         when (2** 6)+1 to 2** 7 => return( 7);
         when (2** 7)+1 to 2** 8 => return( 8);
         when (2** 8)+1 to 2** 9 => return( 9);
         when (2** 9)+1 to 2**10 => return(10);
         when (2**10)+1 to 2**11 => return(11);
         when (2**11)+1 to 2**12 => return(12);
         when (2**12)+1 to 2**13 => return(13);
         when (2**13)+1 to 2**14 => return(14);
         when (2**14)+1 to 2**15 => return(15);
         when (2**15)+1 to 2**16 => return(16);
         when (2**16)+1 to 2**17 => return(17);
         when (2**17)+1 to 2**18 => return(18);
         when (2**18)+1 to 2**19 => return(19);
         when (2**19)+1 to 2**20 => return(20);
         when (2**20)+1 to 2**21 => return(21);
         when (2**21)+1 to 2**22 => return(22);
         when (2**22)+1 to 2**23 => return(23);
         when (2**23)+1 to 2**24 => return(24);
         when (2**24)+1 to 2**25 => return(25);
         when (2**25)+1 to 2**26 => return(26);
         when (2**26)+1 to 2**27 => return(27);
         when (2**27)+1 to 2**28 => return(28);
         when (2**28)+1 to 2**29 => return(29);
         when (2**29)+1 to 2**30 => return(30);
         when (2**30)+1 to (2**31)-1 => return(31);
         when others => return(0);
     end case;
 end;

With this weird code structure, that works in synthesis and simulation.

Upvotes: 0

scary_jeff
scary_jeff

Reputation: 4384

Try constraining the range of the input, for example:

function clogb2 (bit_depth : integer range 1 to 32) return integer is

Also, if Vivado is generating code that it cannot compile, this is a bug that you should report on the Xilinx forums.

Upvotes: 0

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