fraiser
fraiser

Reputation: 969

One-way switch in verilog

I need to hold a value so that once it switches to one, it won't switch back to zero.

I am trying to make a Hangman game for an FPGA board. To do so, I have a constant onesLetter which is the correct letter to be displayed. The user has to guess letters. Once the onesLetter has been guessed correctly, I want to display it and keep displaying it during other guesses (not reverting back to the default display).

Here is what I have come up with:

// onesLetter is a constant we are checking against
// tempBooleanOnes represents if letter is currently being guessed
// tempSeg is input to check against onesLetter
// boolean is an input bit
wire tempBooleanOnes = (boolean && (onesLetter == tempSeg));

// Represent whether letter has been guessed or not
wire booleanOnes;

// Whether letter has been guessed or is being guessed
assign booleanOnes = (booleanOnes) || (tempBooleanOnes);

That is the expression I need to implement. However, I get an error saying I can't use booleanOnes for both the assigned wire and the expression. I've tried using a module register (output, input, clock, enable, reset) that I've implemented, with the enable being ~booleanOnes (do not overwrite when already 1, or already guessed) and the output being booleanOnes, but that also raises an error.

This is the code for the register module I have tried in place of the assign statement.

register regOnes(booleanOnes, tempBooleanOnes, clk, ~booleanOnes, 1'b0);

Upvotes: 1

Views: 653

Answers (1)

Charles Clayton
Charles Clayton

Reputation: 17956

You shouldn't do this:

assign booleanOnes = (booleanOnes) || (tempBooleanOnes);

Since you're assigning to and from the same wire.

This code will set booleanOnes to 1 and will never be reset.

reg booleanOnes = 0; 
always @* begin
   if(boolean && (onesLetter == tempSeg)) begin
       booleanOnes = 1;
   end
end

Upvotes: 1

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