CODEWITHSUNDEEP
syntax-errorconditional-statementsvhdl
Andre K
Andre K

Reputation: 347

VHDL: Error in when conditional

This question is very basic, but I just started learning VHDL, and I can't figure out the error.

So, I'm using Quartus Prime Lite, and getting error

Error (10500): VHDL syntax error at Package_42.vhd(30) near text "when"; expecting ";"

when compiling the following piece of code.

Any ideas what could be wrong?

Thanks!

library ieee;
use ieee.std_logic_1164.all;

package Package_42 is
    subtype StepType is std_logic_vector(3 downto 0);

    function Problem_42(a   : in std_logic;
                        b   : in std_logic;
                        j   : in StepType;
                        k   : in StepType) return StepType;
end;

package body Package_42 is
    function Problem_42(a   : in std_logic;
                        b   : in std_logic;
                        j   : in StepType;
                        k   : in StepType) return StepType is

        variable Step : StepType    := "----";
    begin
        Step :=  "0100" when a = '1' and b = '0' else <-- ERROR is HERE!!!
                 j      when a = '1'             else
                 k      when             b = '1' else
                 "----";

        return Step;
    end;
end package body;

Upvotes: 0

Views: 259

Answers (1)

Jim Lewis
Jim Lewis

Reputation: 4003

First, make sure you have turned on the VHDL-2008 switch.

If that does not work, file a bug report against your tool and re-write your code using an if statement.

Upvotes: 1

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