CODEWITHSUNDEEP
verilog
D.Wei
D.Wei

Reputation: 55

Bus of 2d array in the verilog

After declaring the following:

reg [15:0] a [3:0][2:0]

I would like to get the value at index [12] a [2][1], how do I do this?

Upvotes: 0

Views: 1717

Answers (1)

Matthew
Matthew

Reputation: 13937

a[2][1][12]

An N-dimensional array in Verilog is numbered like this:

reg [15:0] a [3:0][2:0]  ... [12345:0];
    (N+1)th   1st  2nd  ...     Nth

With a Verilog array you must index either all or none of the right-hand dimensions. Indexing the left-hand dimension is optional, but you can only do it if you've indexed the right-hand dimensions. So, you can

  • refer to an array in its entirety: eg a
  • refer to a single element of the array: eg a[2][1]
  • refer to a bit or bits of a single element of an array: eg a[2][1][12]

Therefore, it makes sense to index the left-hand dimension last.

Upvotes: 1

Related Questions