CODEWITHSUNDEEP
vhdlfpga
rubana
rubana

Reputation: 41

How to declare a custom library in vhdl?

I am going through a code which uses a custom library. But i am unable to see the content of the library. Also, I want to know exactly how was this library created. It is for an actel FPGA A42, and the developer has named the library as a42.all. The tool sused is Libero IDE

Upvotes: 2

Views: 1974

Answers (1)

Tricky
Tricky

Reputation: 4471

Libraries are created in the tool, not VHDL itself. For example, in modelsim, libraries are created with the vlib command, eg.

vlib my_library;

In VHDL you can include your library in any region with the library command, and objects (eg package) can be included with the use command:

library my_library;
use my_library.some_package.all;

Upvotes: 1

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