CODEWITHSUNDEEP
packagesystem-verilog
Anda Hong
Anda Hong

Reputation: 31

Cannot export packages in systemverilog

I've tried to make a big package that exports sub packages for not to make any dependency in test files when new sub package is added. For this, I just simply did as in following but got a compile error, it seems export does not work properly as described in LRM. Is there any missing points in my code?

package sub_pkg_A;
  ..
endpackage

package sub_pkg_B;
  ..
endpackage

// just import and export
package top_pkg;
   import sub_pkg_A::*;
   import sub_pkg_B::*;
   export sub_pkg_A::*;
   export sub_pkg_B::*;
endpackage

// test file
module my_test;
    import top_pkg::*;
    ..
endmodule

Upvotes: 3

Views: 2406

Answers (1)

dave_59
dave_59

Reputation: 42748

The issue is the wildcard import statement import pkg::*; doesn't import any identifiers until there is an explicit reference to that identifier.

package sub_pkg_A;
  int A,B,C;
endpackage

// just import and export
package top_pkg;
   import sub_pkg_A::*; // A, B, C become candidates for importing
   int D = A; // imports A
   export sub_pkg_A::*; // exports A
   export sub_pkg_A::B; // imports/ exports B

endpackage

// test file
module my_test;
    import top_pkg::*; // A, B, D become candidates for importing. 
    ..
endmodule

Upvotes: 2

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