CODEWITHSUNDEEP
verilog
Pressing_Keys_24_7
Pressing_Keys_24_7

Reputation: 1863

Unable to open a file in Verilog

I have written the following code in Verilog to open a file:

initial begin
clk=0;  i=0;done=0;
data = $fopen(":P\Desktop\image.txt", "r");
if (data== `NULL) begin
    $display("data_file handle was NULL");
    $finish;
end
final = $fopen(".txt","w");
end

I have specified the file location but, it returns an error:

WARNING: file PDesktopimage.txt could not opened

Any help how could I reoslve this issue?

Upvotes: 1

Views: 2904

Answers (1)

toolic
toolic

Reputation: 62236

When I run your code, I get this message:

Open failed on file ":PDesktopimage.txt". No such file or directory

Like your message, it does not have the backslash characters which are your directory separators. However, my message does have the leading colon (:).

To get the backslashes, I escaped the backslashes using \\:

initial data = $fopen(":P\\Desktop\\image.txt", "r");

It is a good practice to avoid issues like this by placing the file to open into the current working directory before you run your simulation, then just open the filename without a path:

initial data = $fopen("image.txt", "r");

It is common to use a script to manage files and run the simulation.

Upvotes: 1

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