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Reputation: 13

Do delay slots after branches count in the total amount of cycles? (Mips classic hardware)

My course material is not consistent in how to count total amount of cycles. Suppose I have this code implemented in the classic Mips hardware:

l1:
 sll  $t2, $t0, 2   # $t2 = i * 4  
 add  $t3, $a0,$t2  # $t3 = u + *i, dvs &u[i]  
 lw  $t4, 0($t3)   # $t4 = u[i]  
 add  $t1, $t1, $t4  # tmp += u[i]  
 addi  $t0, $t0,1   # i++  
 slt  $t5, $t0, $a1  # if (i < j)  
 bne  $t5, $zero, L1  # goto L1  
 add  $v0, $zero, $t1

Would I say that the loop contains 8 instructions or only 7? If there hadn't been an instruction after "bne $t5, $zero, L1", how many instructions does the loop contain?

Upvotes: 0

Views: 35

Answers (1)

Erik Eidt
Erik Eidt

Reputation: 26656

The classic MIPS has a branch delay slot.  That means the branch will execute after the very next instruction following the branch instruction finishes — this instruction is said to be "in the delay slot" position.  That then means that the instruction following a branch (1) must exist, and (2) must execute, before the branch can be taken.

Since delay slot instructions must execute as part of branching, they would necessarily count as being part of a loop, same as any branch instruction.

Upvotes: 0

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