Reputation: 3
Question: How to remove some standard instructions from the ISA that LLVM back end uses to generate machine code? i.e., by editing .td
files.
Architecture: RISCV
More context: We develop ASICs that uses very specific instructions from the ISA of the RISCV, which means one core might have SUB
instruction and the other core might not have it. So, we need to tweak the LLVM to recognize this change and generate alternate machine code. It is easy to disable extensions like vector, float etc., but disabling native ISA instructions seems to be hard.
The reason I think it's possible is, For example if google makes a TPU with a fully supported ISA and they make another version that doesn't support a set of instructions they tweak their software tools to support this change. It might not be as easy as commenting some lines but shouldn't be as hard as writing complex code.Has anyone done it or have an idea of how to go about this please?
Thanks
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