How does the ROB track instructions from multiple logical threads in a core?

Question

If a core supports simultaneous multithreading (SMT) and executes multiple logical threads, how does the Reorder Buffer (ROB) differentiate which instruction belongs to which logical thread?

Additionally, I have a few related questions:

• Is a process the same as a logical thread, or is there a distinction?
• During a context switch, what exactly happens in terms of hardware and software?
• Since logical threads share the same physical core, is there a physical identifier for each thread to distinguish them at the hardware level? If not, how does the OS differentiate which process belongs to which thread?

Would appreciate any clarification on these concepts!

I have read about Simultaneous Multithreading (SMT) and Reorder Buffers (ROB), but I am unclear on how the ROB differentiates between instructions from different logical threads. I expected there to be some hardware identifier for each thread, but I couldn't find clear documentation on how this is handled at the microarchitectural level.

I was also trying to understand what happens when a process is executing on a physical thread and, in the middle of a speculation, a context switch occurs. How does the CPU handle the speculative state of one process while switching to another? Does it flush speculative instructions, or are there mechanisms to preserve and restore the state?

Additionally, I read about context switching, but I am confused about whether logical threads and processes are the same thing and how the OS and hardware track them separately. I was expecting a direct mapping between logical threads and some physical identifier, but I am not sure if that is the case.

I am looking for a deeper understanding of how these mechanisms work in modern processors.