Reputation: 4768
I'm looking for easiest way to divide two floating point numbers using VHDL. I need the code to be synthesizable (I'll be implementing it on Spartan 3 FPGA).
First operand will always be a fixed number (e.g. 600), and second one will be integer, let's say between 0 and 99999. Fixed number is dividend, and the integer one is divisor. So I'll have to calculate something like this: 600/124. Or any other number instead of 124, of course that is in range between 0 and 99999. Second number (the one that is changing) will always be integer !! (there won't be something like 123.45).
After division, I need to convert the result into integer (round it up or just ignore numbers after decimal point, which ever is faster).
Any ideas ? Thanks !
Upvotes: 1
Views: 5197
Reputation:
There are many ways to do this, with the easiest being a ROM. You don't need floating point anywhere since doing an integer divide and compensating for a non-zero remainder can give you the same results. I'd suggest calculating the first 600 results in MATLAB or a spreadsheet so you can see that handling values up to 99999 isn't necessary.
Also, some common nomenclature for range and precision is QI.F where I is the number of integer bits and F is the number of fractional bits. Thus 0..99999 would be Q17.0 and your output would be Q10.0.
Upvotes: 3
Reputation: 935
There's an FP divide function in this VHDL file from this site.
Upvotes: 3