CODEWITHSUNDEEP
vhdl
charpi
charpi

Reputation: 363

Behavioural logic sequential, code cannot work?

Basically I have the following code in my module. I want to change a number to it's 2's complement negative.

Eg. 100 becomes -100, and -200 becomes 200.

A shortcut I found is to read from the LSB until you reach a '1', then flip all the bits after it. I'm trying a implement a 32 bit converter using the least performance tradeoff (I heard num <= not(num) + 1 is quite resource heavy)

                flipBit <= '0'; -- reset the flip bit
                FOR i IN 0 TO 31 LOOP
                    IF flipBit = '1' THEN
                        tempSubtract(i) <= not Operand2(i);
                    ELSE
                        tempSubtract(i) <= Operand2(i);
                    END IF;
                    IF Operand2(i) = '1' THEN
                        flipBit <= '1';
                    END IF;
                END LOOP;

However, all it does it to NOT the entire thing. Also, when I do num <= not(num)+1, the slow way, it gives me gibberish numbers too.

Can anyone tell me what's wrong? Thanks.

Upvotes: 0

Views: 61

Answers (2)

zennehoy
zennehoy

Reputation: 6856

This is something the synthesis tool can probably do better than you, so I would recommend to simply use z <= -a;, where a and z are of type signed.

This will cause synthesis to optimize the negation for your target architecture, no matter what it is. For example, calculating not + 1 in an FPGA is very efficient.

Upvotes: 2

Russell
Russell

Reputation: 3465

You could just do: signal <= signal * -1 and the tools would synthesize it for you. That might not be the most efficient though. I don't think it would take up THAT much logic though. If you really need a more efficient solution you can do this:

Is there any reason you need to do this conversion you show above in 1 clock cycle? If you took 32 clocks to do it it would be easier and probably less resources. I would recommend that you remove your FOR loop, as it is causing most of the problems you are having.

Upvotes: 0

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