Reputation: 87
Currently, I trying to review the ring counter in verilog. But I am curious about what is the purpose of ring counter? I didn't quite catch well. Does anyone know what is the purpose of the ring counters?
Upvotes: 2
Views: 596
Reputation: 20514
With Ring counters four flip-flops can be used to create a four state FSM with no additional logic. A traditional state machine would require 2 flip-flops and next state logic. Wikipedia states that the Ring counter would be simpler and have a smaller synthesis area.
I would expect adder and next state logic required to be of a similar size to the two extra flip-flops used in the ring counter, there making a four state machine of either type roughly equivalent. The ring counter will grow quite quickly as well, each extra state requires an additional flip-flop. and states must always follow a linear pattern. Most FSMs have branches and react to inputs minimising the opportunities to use the ring counter.
The ring counter has the advantage that it state is one-hot. Which might simplify the output logic.
A ring counter FSM:
module ring_counter(
input clk,
input rst_n,
//outputs ...
);
reg state0;
reg state1;
reg state2;
reg state3;
always @(posedge clk, negedge rst_n) begin
if (~rst_n) begin
state0 <= 1'b1;
state1 <= 1'b0;
state2 <= 1'b0;
state3 <= 1'b0;
end
else begin
state0 <= state3;
state1 <= state0;
state2 <= state1;
state3 <= state2;
end
end
endmodule
The overall state will start as 0001
and then rotate around 0010
, 0100
, 1000
and back to the beginning 0001
.
In comparison a typical FSM could be:
reg [1:0] state;
always @(posedge clk, negedge rst_n) begin
if (~rst_n) begin
state <= 'b0;
end
else begin
state <= state + 1;
end
end
Which will iterate through states 00
-> 01
-> 10
-> 11
Upvotes: 1