CODEWITHSUNDEEP
vhdl
zainab
zainab

Reputation: 111

Multiplication of two different bit numbers in VHDL

I have two numbers A and B, both of different sizes and i need to multiply them using VHDL. I don't know the exact logic to multiply them.

Upvotes: 6

Views: 42778

Answers (1)

Morten Zilmer
Morten Zilmer

Reputation: 15924

If you are trying to multiply two std_logic_vector, then * will fails, since std_logic_vector is just an array of std_logic elements, but does not have an inherit numerical representation.

So take a look a the ieee.numeric_std VHDL package. This defines unsigned and signed types that assume a typical numerical representation of an array, along with operators on these types, including *. Using this package you can do:

use ieee.numeric_std.all;
...
c <= std_logic_vector(unsigned(a) * unsigned(b));

Note that for * the c'length is a'length + b'length.

Btw. welcome to Stack Overflow, and please spend some time in Stack Overflow Help Center, so you can get better answers in the future, and avoid being voted down or get the answer closed.

Upvotes: 19

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