CODEWITHSUNDEEP
vhdl
kechap
kechap

Reputation: 2087

Concatenation of the same bits

I am writing a simple vga controller and I find myself repeating the same pattern again and again. How I can avoid this. 

red_out <= zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y63)&zero(x-106,y-63);
green_out <= zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63);
blue_out <= zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y-63);

Maybe a command that will help me avoid the repetition?

Upvotes: 1

Views: 1646

Answers (2)

wap26
wap26

Reputation: 2290

If your vectors receive a copy a the same single bit then the following code would do it, and would be simpler than resorting to functions:

red_out   <= (others => zero(x-106,y-63));
green_out <= (others => zero(x-106,y-63));
blue_out  <= (others => zero(x-106,y-63));

or even

my_bit    <= zero(x-106,y-63);
red_out   <= (others => my_bit);
green_out <= (others => my_bit);
blue_out  <= (others => my_bit);

Upvotes: 2

simon
simon

Reputation: 1145

  • To replace the expression zero(x-106,y-63)&zero(x-106,y-63)&zero(x-106,y63)&zero(x-106,y-63), use a function. The code would then look something like red_out<=f(zero, x, y); etc.
  • To replace all three statements, use a procedure. The code would then look something like p(red_out, green_out, blue_out, zero, x, y).

Check http://www.csee.umbc.edu/portal/help/VHDL/design.html for the syntax.

Upvotes: 2

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